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Merge branch 'main' of https://github.com/openwrt/openwrt

This commit is contained in:
kos 2024-01-03 13:03:25 +00:00
parent 67d3537649 7ddd3abd27
commit 586a5417bf
61 changed files with 2274 additions and 1013 deletions
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4
include/kernel-6.1
View File

@ -1,2 +1,2 @@
LINUX_VERSION-6.1 = .69
LINUX_KERNEL_HASH-6.1.69 = 7e3d2694d18ce502068cc88a430da809abbd17d0773268524ebece442612b541
LINUX_VERSION-6.1 = .70
LINUX_KERNEL_HASH-6.1.70 = ed1365266456c07696a7499581aec5d851ca2296f4f6f90f23d189ea5a56afef

10
package/base-files/files/lib/functions.sh
View File

@ -270,11 +270,6 @@ default_postinst() {
add_group_and_user "${pkgname}"
if [ -f "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" ]; then
( . "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" )
ret=$?
fi
if [ -d "$root/rootfs-overlay" ]; then
cp -R $root/rootfs-overlay/. $root/
rm -fR $root/rootfs-overlay/
@ -300,6 +295,11 @@ default_postinst() {
rm -f /tmp/luci-indexcache
fi
if [ -f "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" ]; then
( . "$root/usr/lib/opkg/info/${pkgname}.postinst-pkg" )
ret=$?
fi
local shell="$(command -v bash)"
for i in $(grep -s "^/etc/init.d/" "$root$filelist"); do
if [ -n "$root" ]; then

9
package/boot/uboot-envtools/files/mediatek_filogic
View File

@ -12,6 +12,9 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
asus,rt-ax59u)
ubootenv_add_uci_config "/dev/mtd0" "0x100000" "0x20000" "0x20000"
;;
bananapi,bpi-r3)
rootdev="$(cmdline_get_var root)"
rootdev="${rootdev##*/}"
@ -56,7 +59,8 @@ cmcc,rax3000m)
;;
cetron,ct3003|\
netgear,wax220|\
zbtlink,zbt-z8102ax)
zbtlink,zbt-z8102ax|\
zbtlink,zbt-z8103ax)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
;;
h3c,magic-nx30-pro|\
@ -82,7 +86,8 @@ glinet,gl-mt6000)
glinet,gl-mt3000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000"
;;
mercusys,mr90x-v1)
mercusys,mr90x-v1|\
routerich,ax3000)
local envdev=/dev/mtd$(find_mtd_index "u-boot-env")
ubootenv_add_uci_config "$envdev" "0x0" "0x20000" "0x20000" "1"
;;

4
package/boot/uboot-envtools/files/mediatek_mt7622
View File

@ -12,6 +12,10 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1)
ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x2000" "0x2000"
;;
linksys,e8450-ubi)
ubootenv_add_uci_config "/dev/ubi0_0" "0x0" "0x1f000" "0x1f000" "1"
ubootenv_add_uci_config "/dev/ubi0_1" "0x0" "0x1f000" "0x1f000" "1"

4
package/libs/wolfssl/Makefile
View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=wolfssl
PKG_VERSION:=5.6.4-stable
PKG_VERSION:=5.6.6-stable
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
PKG_HASH:=031691906794ff45e1e792561cf31759f5d29ac74936bc8dffb8b14f16d820b4
PKG_HASH:=3d2ca672d41c2c2fa667885a80d6fa03c3e91f0f4f72f87aef2bc947e8c87237
PKG_FIXUP:=libtool libtool-abiver
PKG_INSTALL:=1

2
package/libs/wolfssl/patches/100-disable-hardening-check.patch
View File

@ -1,6 +1,6 @@
--- a/wolfssl/wolfcrypt/settings.h
+++ b/wolfssl/wolfcrypt/settings.h
@@ -2630,7 +2630,7 @@ extern void uITRON4_free(void *p) ;
@@ -2774,7 +2774,7 @@ extern void uITRON4_free(void *p) ;
/* warning for not using harden build options (default with ./configure) */
/* do not warn if big integer support is disabled */

6
package/network/services/dropbear/files/dropbear.init
View File

@ -155,6 +155,12 @@ dropbear_instance()
PIDCOUNT="$(( ${PIDCOUNT} + 1))"
local pid_file="/var/run/${NAME}.${PIDCOUNT}.pid"
# Increase default receive window size to increase
# throughput on high latency links
if [ "${RecvWindowSize}" -eq "0" ]; then
RecvWindowSize="262144"
fi
procd_open_instance
procd_set_param command "$PROG" -F -P "$pid_file"
[ "${PasswordAuth}" -eq 0 ] && procd_append_param command -s

54
package/utils/usbgadget/Makefile Normal file
View File

@ -0,0 +1,54 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=usbgadget
PKG_RELEASE:=1
PKG_LICENSE:=BSD-2-Clause
PKG_MAINTAINER:=Chuanhong Guo <gch981213@gmail.com>
include $(INCLUDE_DIR)/package.mk
define Package/$(PKG_NAME)
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:=@USB_GADGET_SUPPORT +kmod-usb-gadget +kmod-usb-lib-composite
TITLE:=init script to create USB gadgets
endef
define Build/Compile
endef
define Package/$(PKG_NAME)/install
$(INSTALL_DIR) $(1)/etc/config $(1)/etc/init.d
$(INSTALL_CONF) ./files/usbgadget.conf $(1)/etc/config/usbgadget
$(INSTALL_BIN) ./files/usbgadget.init $(1)/etc/init.d/usbgadget
endef
$(eval $(call BuildPackage,$(PKG_NAME)))
# 1: short name
# 2: description
# 3: dependencies on other packages
define GadgetPreset
define Package/$(PKG_NAME)-$(1)
SECTION:=utils
CATEGORY:=Utilities
TITLE+= $(2) gadget preset
DEPENDS+= $(3)
endef
define Package/$(PKG_NAME)-$(1)/description
This package contains the USB gadget preset for $(3).
endef
define Package/$(PKG_NAME)-$(1)/install
$(INSTALL_DIR) $$(1)/usr/share/usbgadget
$(INSTALL_CONF) ./files/presets/$(1) $$(1)/usr/share/usbgadget
endef
$$(eval $$(call BuildPackage,$(PKG_NAME)-$(1)))
endef
$(eval $(call GadgetPreset,ncm,CDC-NCM,+kmod-usb-gadget-ncm))
$(eval $(call GadgetPreset,acm,CDC-ACM,+kmod-usb-gadget-serial))

13
package/utils/usbgadget/files/presets/acm Normal file
View File

@ -0,0 +1,13 @@
config gadget 'g1'
option idVendor '0x0525'
option idProduct '0xa4a7'
option bDeviceClass '2'
option product 'Gadget Serial v2.4'
config configuration 'cfg1'
option configuration 'ACM'
option gadget 'g1'
config function 'acm1'
option function 'acm'
option configuration 'cfg1'

13
package/utils/usbgadget/files/presets/ncm Normal file
View File

@ -0,0 +1,13 @@
config gadget 'g1'
option idVendor '0x0525'
option idProduct '0xa4a1'
option bDeviceClass '2'
option product 'NCM Gadget'
config configuration 'cfg1'
option configuration 'NCM'
option gadget 'g1'
config function 'ncm1'
option function 'ncm'
option configuration 'cfg1'

12
package/utils/usbgadget/files/usbgadget.conf Normal file
View File

@ -0,0 +1,12 @@
# apply a preset under /usr/share/usbgadget
config preset
option name 'ncm'
# specify a UDC to enable this gadget:
# option UDC 'musb-hdrc.2.auto'
# or create a custom gadget here following the content of presets:
#config gadget 'g1'
# option idVendor ...
# ...
# and add an UDC under the gadget section to enable it:
# option UDC 'musb-hdrc.2.auto'

144
package/utils/usbgadget/files/usbgadget.init Normal file
View File

@ -0,0 +1,144 @@
#!/bin/sh /etc/rc.common
START=19
GADGET_FS=/sys/kernel/config/usb_gadget
GADGET_PRESETS_DIR=/usr/share/usbgadget
GADGET_PREFIX=owrt_
log() {
logger -t usbgadget "$@"
}
apply_configs() {
local fs_path="$1"
local cfg="$2"
for param in $(find "$fs_path" -maxdepth 1 -type f -exec basename '{}' ';'); do
[ "$param" = "UDC" ] && continue
config_get val "$cfg" "$param"
[ -n "$val" ] && echo "$val" > "${fs_path}/${param}"
done
}
setup_gadget() {
local cfg="$1"
local gadget_path="${GADGET_FS}/${GADGET_PREFIX}${cfg}"
local param udc
config_get udc "$cfg" UDC
[ -z "$udc" ] && return
mkdir "$gadget_path" || return
apply_configs "$gadget_path" "$cfg"
local strings_path="${gadget_path}/strings/0x409"
mkdir "$strings_path"
apply_configs "$strings_path" "$cfg"
}
setup_configuration() {
local cfg="$1"
local gadget
config_get gadget "$cfg" gadget
local cfgs_path="${GADGET_FS}/${GADGET_PREFIX}${gadget}/configs"
[ -d "${cfgs_path}" ] || return
local cfg_path="${cfgs_path}/${cfg}.1"
mkdir "$cfg_path" || {
log "failed to create configuration ${cfg}"
return
}
apply_configs "$cfg_path" "$cfg"
local strings_path="${cfg_path}/strings/0x409"
mkdir "$strings_path"
apply_configs "$strings_path" "$cfg"
}
setup_function() {
local cfg="$1"
local usbcfg gadget usbfun
config_get usbcfg "$cfg" configuration
[ -z "$usbcfg" ] && return
config_get usbfun "$cfg" function
[ -z "$usbfun" ] && return
config_get gadget "$usbcfg" gadget
local gadget_path="${GADGET_FS}/${GADGET_PREFIX}${gadget}"
local cfg_path="${gadget_path}/configs/${usbcfg}.1"
[ -d "${cfg_path}" ] || return
local fun_path="${gadget_path}/functions/${usbfun}.${cfg}"
mkdir "$fun_path" || {
log "failed to create function ${usbfun}.${cfg}"
return
}
apply_configs "$fun_path" "$cfg"
ln -s "$fun_path" "$cfg_path"
}
attach_gadget() {
local cfg="$1"
local gadget_path="${GADGET_FS}/${GADGET_PREFIX}${cfg}"
local param udc
config_get udc "$cfg" UDC
[ -z "$udc" ] && return
echo "$udc" > "$gadget_path/UDC"
}
load_gadget() {
config_foreach setup_gadget gadget
config_foreach setup_configuration configuration
config_foreach setup_function function
config_foreach attach_gadget gadget
}
# use subshell for isolated env
apply_preset() (
local preset="$1"
local gadget="$2"
UCI_CONFIG_DIR=$GADGET_PRESETS_DIR config_load "$1"
config_set g1 UDC "$2"
load_gadget
)
load_preset() {
local cfg="$1"
config_get name "$cfg" name
config_get udc "$cfg" UDC
[ -z "$udc" ] && return
apply_preset $name $udc
}
start() {
grep -q /sys/kernel/config /proc/mounts || \
mount -t configfs configfs /sys/kernel/config
[ -d /sys/kernel/config/usb_gadget ] || {
log "usb_gadget support not found."
return 1
}
config_load usbgadget
config_foreach load_preset preset
load_gadget
}
stop() {
for gadget_path in ${GADGET_FS}/${GADGET_PREFIX}* ; do
[ -d "$gadget_path" ] || continue
echo "" > ${gadget_path}/UDC
find ${gadget_path}/configs -maxdepth 2 -type l -exec rm '{}' ';'
rmdir ${gadget_path}/configs/*/strings/*
rmdir ${gadget_path}/configs/*
rmdir ${gadget_path}/functions/*
rmdir ${gadget_path}/strings/*
rmdir $gadget_path
done
}

2
target/linux/bcm27xx/patches-6.1/950-0045-drm-atomic-helpers-remove-legacy_cursor_update-hacks.patch
View File

@ -88,7 +88,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
commit->event = kzalloc(sizeof(*commit->event),
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -7743,6 +7743,19 @@ static int intel_atomic_commit(struct dr
@@ -7754,6 +7754,19 @@ static int intel_atomic_commit(struct dr
state->base.legacy_cursor_update = false;
}

4
target/linux/bcm27xx/patches-6.1/950-0078-Revert-Bluetooth-Always-request-for-user-confirmatio.patch
View File

@ -24,7 +24,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
--- a/net/bluetooth/smp.c
+++ b/net/bluetooth/smp.c
@@ -2207,7 +2207,7 @@ mackey_and_ltk:
@@ -2214,7 +2214,7 @@ mackey_and_ltk:
if (err)
return SMP_UNSPECIFIED;
@ -33,7 +33,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
if (hcon->out) {
sc_dhkey_check(smp);
SMP_ALLOW_CMD(smp, SMP_CMD_DHKEY_CHECK);
@@ -2222,9 +2222,6 @@ mackey_and_ltk:
@@ -2229,9 +2229,6 @@ mackey_and_ltk:
confirm_hint = 0;
confirm:

2
target/linux/generic/hack-6.1/721-net-add-packet-mangeling.patch
View File

@ -105,7 +105,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
help
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -3604,6 +3604,11 @@ static int xmit_one(struct sk_buff *skb,
@@ -3607,6 +3607,11 @@ static int xmit_one(struct sk_buff *skb,
if (dev_nit_active(dev))
dev_queue_xmit_nit(skb, dev);

4
target/linux/generic/hack-6.1/780-usb-net-MeigLink_modem_support.patch
View File

@ -43,7 +43,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
#define QUECTEL_VENDOR_ID 0x2c7c
/* These Quectel products use Quectel's vendor ID */
@@ -1146,6 +1151,11 @@ static const struct usb_device_id option
@@ -1147,6 +1152,11 @@ static const struct usb_device_id option
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */
.driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) },
@ -55,7 +55,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
/* Quectel products using Qualcomm vendor ID */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)},
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20),
@@ -1187,6 +1197,11 @@ static const struct usb_device_id option
@@ -1188,6 +1198,11 @@ static const struct usb_device_id option
.driver_info = ZLP },
{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
.driver_info = RSVD(4) },

8
target/linux/generic/pending-6.1/680-NET-skip-GRO-for-foreign-MAC-addresses.patch
View File

@ -44,7 +44,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -7622,6 +7622,48 @@ static void __netdev_adjacent_dev_unlink
@@ -7625,6 +7625,48 @@ static void __netdev_adjacent_dev_unlink
&upper_dev->adj_list.lower);
}
@ -93,7 +93,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static int __netdev_upper_dev_link(struct net_device *dev,
struct net_device *upper_dev, bool master,
void *upper_priv, void *upper_info,
@@ -7673,6 +7715,7 @@ static int __netdev_upper_dev_link(struc
@@ -7676,6 +7718,7 @@ static int __netdev_upper_dev_link(struc
if (ret)
return ret;
@ -101,7 +101,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
ret = notifier_to_errno(ret);
@@ -7769,6 +7812,7 @@ static void __netdev_upper_dev_unlink(st
@@ -7772,6 +7815,7 @@ static void __netdev_upper_dev_unlink(st
__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
@ -109,7 +109,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
@@ -8821,6 +8865,7 @@ int dev_set_mac_address(struct net_devic
@@ -8824,6 +8868,7 @@ int dev_set_mac_address(struct net_devic
if (err)
return err;
dev->addr_assign_type = NET_ADDR_SET;

18
target/linux/generic/pending-6.1/760-net-core-add-optional-threading-for-backlog-processi.patch
View File

@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#endif
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -4622,7 +4622,7 @@ static int napi_schedule_rps(struct soft
@@ -4625,7 +4625,7 @@ static int napi_schedule_rps(struct soft
struct softnet_data *mysd = this_cpu_ptr(&softnet_data);
#ifdef CONFIG_RPS
@ -39,7 +39,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
sd->rps_ipi_next = mysd->rps_ipi_list;
mysd->rps_ipi_list = sd;
@@ -5803,6 +5803,8 @@ static DEFINE_PER_CPU(struct work_struct
@@ -5806,6 +5806,8 @@ static DEFINE_PER_CPU(struct work_struct
/* Network device is going away, flush any packets still pending */
static void flush_backlog(struct work_struct *work)
{
@ -48,7 +48,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
struct sk_buff *skb, *tmp;
struct softnet_data *sd;
@@ -5817,8 +5819,17 @@ static void flush_backlog(struct work_st
@@ -5820,8 +5822,17 @@ static void flush_backlog(struct work_st
input_queue_head_incr(sd);
}
}
@ -66,7 +66,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
skb_queue_walk_safe(&sd->process_queue, skb, tmp) {
if (skb->dev->reg_state == NETREG_UNREGISTERING) {
__skb_unlink(skb, &sd->process_queue);
@@ -5826,7 +5837,16 @@ static void flush_backlog(struct work_st
@@ -5829,7 +5840,16 @@ static void flush_backlog(struct work_st
input_queue_head_incr(sd);
}
}
@ -83,7 +83,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
}
static bool flush_required(int cpu)
@@ -5958,6 +5978,7 @@ static int process_backlog(struct napi_s
@@ -5961,6 +5981,7 @@ static int process_backlog(struct napi_s
}
rps_lock_irq_disable(sd);
@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (skb_queue_empty(&sd->input_pkt_queue)) {
/*
* Inline a custom version of __napi_complete().
@@ -5967,7 +5988,8 @@ static int process_backlog(struct napi_s
@@ -5970,7 +5991,8 @@ static int process_backlog(struct napi_s
* We can use a plain write instead of clear_bit(),
* and we dont need an smp_mb() memory barrier.
*/
@ -101,7 +101,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
again = false;
} else {
skb_queue_splice_tail_init(&sd->input_pkt_queue,
@@ -6383,6 +6405,55 @@ int dev_set_threaded(struct net_device *
@@ -6386,6 +6408,55 @@ int dev_set_threaded(struct net_device *
}
EXPORT_SYMBOL(dev_set_threaded);
@ -157,7 +157,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
void netif_napi_add_weight(struct net_device *dev, struct napi_struct *napi,
int (*poll)(struct napi_struct *, int), int weight)
{
@@ -11165,6 +11236,9 @@ static int dev_cpu_dead(unsigned int old
@@ -11168,6 +11239,9 @@ static int dev_cpu_dead(unsigned int old
raise_softirq_irqoff(NET_TX_SOFTIRQ);
local_irq_enable();
@ -167,7 +167,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#ifdef CONFIG_RPS
remsd = oldsd->rps_ipi_list;
oldsd->rps_ipi_list = NULL;
@@ -11468,6 +11542,7 @@ static int __init net_dev_init(void)
@@ -11471,6 +11545,7 @@ static int __init net_dev_init(void)
INIT_CSD(&sd->defer_csd, trigger_rx_softirq, sd);
spin_lock_init(&sd->defer_lock);

2
target/linux/ipq806x/patches-6.1/700-01-net-introduce-napi_is_scheduled-helper.patch
View File

@ -66,7 +66,7 @@ Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
/**
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -6591,7 +6591,7 @@ static int __napi_poll(struct napi_struc
@@ -6594,7 +6594,7 @@ static int __napi_poll(struct napi_struc
* accidentally calling ->poll() when NAPI is not scheduled.
*/
work = 0;

369
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi Normal file
View File

@ -0,0 +1,369 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622.dtsi"
#include "mt6380.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
serial0 = &uart0;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
button-wps {
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
};
&bch {
status = "okay";
};
&btif {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
phy-mode = "2500base-x";
reg = <0>;
nvmem-cells = <&macaddr_odm 1>;
nvmem-cell-names = "mac-address";
fixed-link {
full-duplex;
pause;
speed = <2500>;
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch: switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 0>;
ports {
wan: port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&macaddr_odm 0>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
&slot0 {
wmac1: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
mediatek,mtd-eeprom = <&factory 0x05000>;
nvmem-cells = <&macaddr_odm 3>;
nvmem-cell-names = "mac-address";
};
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
snand: flash@0 {
compatible = "spi-nand";
mediatek,bmt-table-size = <0x1000>;
mediatek,bmt-v2;
nand-ecc-engine = <&snfi>;
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@C0000 {
label = "Bootloader";
reg = <0x000C0000 0x00080000>;
read-only;
};
partition@140000 {
label = "BootConfig";
reg = <0x00140000 0x00040000>;
};
partition@180000 {
label = "Odm";
reg = <0x00180000 0x00040000>;
read-only;
odm_partition: nvmem-layout {
compatible = "fixed-layout";
};
};
config1: partition@1C0000 {
compatible = "nvmem-cells";
label = "Config1";
reg = <0x001C0000 0x00080000>;
read-only;
};
partition@240000 {
label = "Config2";
reg = <0x00240000 0x00080000>;
read-only;
};
partition@2C0000 {
label = "Kernel1";
reg = <0x002C0000 0x02D00000>;
compatible = "denx,fit";
openwrt,cmdline-match = "boot_part=Kernel1";
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
partition@2FC0000 {
label = "Kernel2";
reg = <0x02FC0000 0x02D00000>;
compatible = "denx,fit";
openwrt,cmdline-match = "boot_part=Kernel2";
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
factory: partition@5CC0000 {
label = "Factory";
reg = <0x05CC0000 0x00100000>;
read-only;
};
partition@5DC0000 {
label = "Mydlink";
reg = <0x05DC0000 0x00200000>;
read-only;
};
partition@5FC0000 {
label = "Storage";
reg = <0x05FC0000 0x00300000>;
read-only;
};
};
};
};
&ssusb {
status = "disabled";
};
&u3phy {
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0000>;
nvmem-cells = <&macaddr_odm 2>;
nvmem-cell-names = "mac-address";
status = "okay";
};

394
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-m32-a1.dts
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@ -1,401 +1,63 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622.dtsi"
#include "mt6380.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi"
#include <dt-bindings/leds/common.h>
/ {
model = "D-Link EAGLE PRO AI M32 A1";
compatible = "dlink,eagle-pro-ai-m32-a1", "mediatek,mt7622";
aliases {
led-boot = &status_orange;
led-failsafe = &status_red;
led-running = &status_white;
led-upgrade = &status_red;
serial0 = &uart0;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
wps {
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
};
led-boot = &led_status_orange;
led-failsafe = &led_status_red;
led-running = &led_status_white;
led-upgrade = &led_status_red;
};
leds {
compatible = "gpio-leds";
status_white: status_white {
label = "white:status";
led_status_white: led-status-white {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
status_orange: status_orange {
label = "orange:status";
led_status_orange: led-status-orange {
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 20 GPIO_ACTIVE_LOW>;
default-state = "on";
};
status_red: status_red {
label = "red:status";
led_status_red: led-status-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
};
&bch {
status = "okay";
};
&btif {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
nvmem-cells = <&macaddr_odm_83>;
nvmem-cell-names = "mac-address";
phy-mode = "2500base-x";
reg = <0>;
fixed-link {
full-duplex;
pause;
speed = <2500>;
&switch {
ports {
port@2 {
reg = <2>;
label = "lan2";
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
wan: port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
port@3 {
reg = <3>;
label = "lan1";
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
&odm_partition {
macaddr_odm: macaddr@83 {
compatible = "mac-base";
reg = <0x83 0x6>;
#nvmem-cell-cells = <1>;
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
&slot0 {
wmac1: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
mediatek,mtd-eeprom = <&factory 0x05000>;
};
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
snand: flash@0 {
compatible = "spi-nand";
mediatek,bmt-table-size = <0x1000>;
mediatek,bmt-v2;
nand-ecc-engine = <&snfi>;
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@C0000 {
label = "Bootloader";
reg = <0x000C0000 0x00080000>;
read-only;
};
partition@140000 {
label = "BootConfig";
reg = <0x00140000 0x00040000>;
read-only;
};
odm: partition@180000 {
label = "Odm";
reg = <0x00180000 0x00040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_odm_83: macaddr@83 {
reg = <0x83 0x6>;
};
};
};
config1: partition@1C0000 {
label = "Config1";
reg = <0x001C0000 0x00080000>;
read-only;
};
partition@240000 {
label = "Config2";
reg = <0x00240000 0x00080000>;
read-only;
};
partition@2C0000 {
label = "Kernel1";
reg = <0x002C0000 0x02D00000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
partition@2FC0000 {
label = "Kernel2";
reg = <0x02FC0000 0x02D00000>;
read-only;
};
factory: partition@5CC0000 {
label = "Factory";
reg = <0x05CC0000 0x00100000>;
read-only;
};
partition@5DC0000 {
label = "Mydlink";
reg = <0x05DC0000 0x00200000>;
read-only;
};
partition@5FC0000 {
label = "Storage";
reg = <0x05FC0000 0x00300000>;
read-only;
};
};
};
};
&ssusb {
status = "disabled";
};
&u3phy {
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};

78
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-r32-a1.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi"
#include <dt-bindings/leds/common.h>
/ {
model = "D-Link EAGLE PRO AI R32 A1";
compatible = "dlink,eagle-pro-ai-r32-a1", "mediatek,mt7622";
aliases {
led-boot = &led_power_orange;
led-failsafe = &led_power_orange;
led-running = &led_power_white;
led-upgrade = &led_power_orange;
};
leds {
compatible = "gpio-leds";
led_power_orange: led-power-orange {
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
};
led_power_white: led-power-white {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
led_internet_orange: led-internet-orange {
color = <LED_COLOR_ID_ORANGE>;
function = "internet"; // LED_FUNCTION_INTERNET;
gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
};
led_internet_white: led-internet-white {
color = <LED_COLOR_ID_WHITE>;
function = "internet"; // LED_FUNCTION_INTERNET;
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
};
};
&switch {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
};
};
&odm_partition {
macaddr_odm: macaddr@81 {
compatible = "mac-base";
reg = <0x81 0x6>;
#nvmem-cell-cells = <1>;
};
};

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target/linux/mediatek/dts/mt7981b-routerich-ax3000.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "Routerich AX3000";
compatible = "routerich,ax3000", "mediatek,mt7981";
aliases {
label-mac-device = &wan;
led-boot = &led_power_blue;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;
led-upgrade = &led_power_blue;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
button-0 {
label = "mesh";
linux,input-type = <EV_SW>;
linux,code = <BTN_0>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
button-1 {
label = "reset";
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WLAN;
function-enumerator = <50>;
gpios = <&pio 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led-1 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_WAN;
gpios = <&pio 6 GPIO_ACTIVE_HIGH>;
};
led_power_blue: led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_POWER;
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
};
led-3 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led-4 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led-5 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led-6 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WAN;
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
led-7 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN;
function-enumerator = <24>;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led-8 {
color = <LED_COLOR_ID_BLUE>;
/* LED_FUNCTION_MESH isn't implemented yet */
function = "mesh";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 (-1)>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <0x1f>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
/* ESMT F50L1G41LB (128M) */
spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4e 0x41 0x4e 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0_all {
label = "spi0.0";
reg = <0x0 0x8000000>;
read-only;
};
partition@0 {
label = "BL2";
reg = <0x0 0x100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
partition@4580000 {
label = "firmware_backup";
reg = <0x4580000 0x2000000>;
read-only;
};
partition@6580000 {
label = "zrsave";
reg = <0x6580000 0x100000>;
read-only;
};
partition@6680000 {
label = "config2";
reg = <0x6680000 0x100000>;
read-only;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
wan: port@4 {
reg = <4>;
label = "wan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 (-2)>;
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&usb_phy {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cell-names = "eeprom";
nvmem-cells = <&eeprom_factory_0>;
};
&xhci {
status = "okay";
mediatek,u3p-dis-msk = <0x1>;
};

269
target/linux/mediatek/dts/mt7981b-zbtlink-zbt-z8103ax.dts Normal file
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@ -0,0 +1,269 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "Zbtlink ZBT-Z8103AX";
compatible = "zbtlink,zbt-z8103ax", "mediatek,mt7981";
aliases {
serial0 = &uart0;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 loglevel=8";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-mesh {
label = "mesh";
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led-wan {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
};
led-status-blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
};
led_status_green: led-status-green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 24 GPIO_ACTIVE_LOW>;
};
led_status_red: led-status-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 25 GPIO_ACTIVE_LOW>;
};
led-wlan2g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
function-enumerator = <0>;
linux,default-trigger = "phy0tpt";
};
led-wlan5g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
function-enumerator = <1>;
linux,default-trigger = "phy1tpt";
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 2>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_4 3>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
};
partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory>;
nvmem-cell-names = "eeprom";
};

263
target/linux/mediatek/dts/mt7986a-asus-rt-ax59u.dts Normal file
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@ -0,0 +1,263 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7986a.dtsi"
/ {
model = "ASUS RT-AX59U";
compatible = "asus,rt-ax59u", "mediatek,mt7986a";
aliases {
serial0 = &uart0;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_blue;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-override = "ubi.mtd=UBI_DEV";
};
memory {
reg = <0 0x40000000 0 0x20000000>;
};
keys {
compatible = "gpio-keys";
button-0 {
label = "wps";
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
button-1 {
label = "reset";
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_status_green: led-0 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led_status_red: led-1 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 12 GPIO_ACTIVE_LOW>;
};
led_status_blue: led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 13 GPIO_ACTIVE_LOW>;
};
};
gpio-export {
compatible = "gpio-export";
out {
gpio-export,name = "led-light";
gpio-export,output = <0>;
gpios = <&pio 22 GPIO_ACTIVE_LOW>;
};
};
};
&crypto {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "wan";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan3";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&pio {
spi_flash_pins: spi-flash-pins-33-to-38 {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
mediatek,pull-down-adv = <0>; /* bias-disable */
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
wf_dbdc_pins: wf-dbdc-pins {
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <20000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x400000>;
read-only;
};
partition@400000 {
label = "UBI_DEV";
reg = <0x400000 0x7c00000>;
};
};
};
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
};
&trng {
status = "okay";
};
&uart0 {
status = "okay";
};
&ssusb {
status = "okay";
};
&usb_phy {
status = "okay";
};

1
target/linux/mediatek/dts/mt7986a-asus-tuf-ax6000.dts
View File

@ -131,6 +131,7 @@
compatible = "ethernet-phy-ieee802.3-c45";
reg = <5>;
mxl,led-drive-vdd;
mxl,led-config = <0x03f0 0x0 0x0 0x0>;
};

432
target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
View File

@ -19,11 +19,13 @@
#address-cells = <2>;
#size-cells = <2>;
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cpus {
@ -99,15 +101,6 @@
};
};
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cci_opp: opp_table_cci {
compatible = "operating-points-v2";
opp-shared;
@ -129,6 +122,13 @@
};
};
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
};
pmu {
compatible = "arm,cortex-a73-pmu";
interrupt-parent = <&gic>;
@ -140,86 +140,6 @@
method = "smc";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@ -238,6 +158,18 @@
regulator-always-on;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
@ -539,6 +471,25 @@
};
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
sgmiisys0: syscon@10060000 {
compatible = "mediatek,mt7988-sgmiisys",
"mediatek,mt7988-sgmiisys_0",
@ -571,28 +522,6 @@
#clock-cells = <1>;
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
mcusys: mcusys@100e0000 {
compatible = "mediatek,mt7988-mcusys", "syscon";
reg = <0 0x100e0000 0 0x1000>;
@ -742,25 +671,6 @@
status = "disabled";
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
fan: pwm-fan {
compatible = "pwm-fan";
/* cooling level (0, 1, 2) : (0% duty, 50% duty, 100% duty) */
@ -780,15 +690,53 @@
nvmem-cell-names = "e_data1";
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
afe: audio-controller@11210000 {
@ -820,6 +768,29 @@
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pcie2: pcie@11280000 {
compatible = "mediatek,mt7988-pcie",
"mediatek,mt7986-pcie",
@ -979,78 +950,6 @@
};
};
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
tphy: tphy@11c50000 {
compatible = "mediatek,mt7988",
"mediatek,generic-tphy-v2";
@ -1108,6 +1007,28 @@
};
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
efuse: efuse@11f50000 {
compatible = "mediatek,efuse";
reg = <0 0x11f50000 0 0x1000>;
@ -1437,5 +1358,84 @@
};
};
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
};

432
target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7988a.dtsi
View File

@ -19,11 +19,13 @@
#address-cells = <2>;
#size-cells = <2>;
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cpus {
@ -99,15 +101,6 @@
};
};
cci: cci {
compatible = "mediatek,mt7988-cci",
"mediatek,mt8183-cci";
clocks = <&mcusys CLK_MCU_BUS_DIV_SEL>,
<&topckgen CLK_TOP_XTAL>;
clock-names = "cci", "intermediate";
operating-points-v2 = <&cci_opp>;
};
cci_opp: opp_table_cci {
compatible = "operating-points-v2";
opp-shared;
@ -129,6 +122,13 @@
};
};
clk40m: oscillator@0 {
compatible = "fixed-clock";
clock-frequency = <40000000>;
#clock-cells = <0>;
clock-output-names = "clkxtal";
};
pmu {
compatible = "arm,cortex-a73-pmu";
interrupt-parent = <&gic>;
@ -140,86 +140,6 @@
method = "smc";
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
@ -238,6 +158,18 @@
regulator-always-on;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* 320 KiB reserved for ARM Trusted Firmware (BL31 and BL32) */
secmon_reserved: secmon@43000000 {
reg = <0 0x43000000 0 0x50000>;
no-map;
};
};
soc {
#address-cells = <2>;
#size-cells = <2>;
@ -539,6 +471,25 @@
};
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
sgmiisys0: syscon@10060000 {
compatible = "mediatek,mt7988-sgmiisys",
"mediatek,mt7988-sgmiisys_0",
@ -571,28 +522,6 @@
#clock-cells = <1>;
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
mcusys: mcusys@100e0000 {
compatible = "mediatek,mt7988-mcusys", "syscon";
reg = <0 0x100e0000 0 0x1000>;
@ -742,25 +671,6 @@
status = "disabled";
};
pwm: pwm@10048000 {
compatible = "mediatek,mt7988-pwm";
reg = <0 0x10048000 0 0x1000>;
#pwm-cells = <2>;
clocks = <&infracfg CLK_INFRA_66M_PWM_BCK>,
<&infracfg CLK_INFRA_66M_PWM_HCK>,
<&infracfg CLK_INFRA_66M_PWM_CK1>,
<&infracfg CLK_INFRA_66M_PWM_CK2>,
<&infracfg CLK_INFRA_66M_PWM_CK3>,
<&infracfg CLK_INFRA_66M_PWM_CK4>,
<&infracfg CLK_INFRA_66M_PWM_CK5>,
<&infracfg CLK_INFRA_66M_PWM_CK6>,
<&infracfg CLK_INFRA_66M_PWM_CK7>,
<&infracfg CLK_INFRA_66M_PWM_CK8>;
clock-names = "top", "main", "pwm1", "pwm2", "pwm3",
"pwm4","pwm5","pwm6","pwm7","pwm8";
status = "disabled";
};
fan: pwm-fan {
compatible = "pwm-fan";
/* cooling level (0, 1, 2) : (0% duty, 50% duty, 100% duty) */
@ -780,15 +690,53 @@
nvmem-cell-names = "e_data1";
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
afe: audio-controller@11210000 {
@ -820,6 +768,29 @@
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
pcie2: pcie@11280000 {
compatible = "mediatek,mt7988-pcie",
"mediatek,mt7986-pcie",
@ -979,78 +950,6 @@
};
};
ssusb0: usb@11190000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11190000 0 0x2e00>,
<0 0x11193e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
phys = <&xphyu2port0 PHY_TYPE_USB2>,
<&xphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS>,
<&infracfg CLK_INFRA_USB_XHCI>,
<&infracfg CLK_INFRA_USB_REF>,
<&infracfg CLK_INFRA_66M_USB_HCK>,
<&infracfg CLK_INFRA_133M_USB_HCK>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
mediatek,p0_speed_fixup;
status = "disabled";
};
ssusb1: usb@11200000 {
compatible = "mediatek,mt7988-xhci",
"mediatek,mtk-xhci";
reg = <0 0x11200000 0 0x2e00>,
<0 0x11203e00 0 0x0100>;
reg-names = "mac", "ippc";
interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
phys = <&tphyu2port0 PHY_TYPE_USB2>,
<&tphyu3port0 PHY_TYPE_USB3>;
clocks = <&infracfg CLK_INFRA_USB_SYS_CK_P1>,
<&infracfg CLK_INFRA_USB_XHCI_CK_P1>,
<&infracfg CLK_INFRA_USB_CK_P1>,
<&infracfg CLK_INFRA_66M_USB_HCK_CK_P1>,
<&infracfg CLK_INFRA_133M_USB_HCK_CK_P1>;
clock-names = "sys_ck",
"xhci_ck",
"ref_ck",
"mcu_ck",
"dma_ck";
#address-cells = <2>;
#size-cells = <2>;
status = "disabled";
};
mmc0: mmc@11230000 {
compatible = "mediatek,mt7986-mmc",
"mediatek,mt7981-mmc";
reg = <0 0x11230000 0 0x1000>,
<0 0x11D60000 0 0x1000>;
interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&infracfg CLK_INFRA_MSDC400>,
<&infracfg CLK_INFRA_MSDC2_HCK>,
<&infracfg CLK_INFRA_66M_MSDC_0_HCK>,
<&infracfg CLK_INFRA_133M_MSDC_0_HCK>;
assigned-clocks = <&topckgen CLK_TOP_EMMC_250M_SEL>,
<&topckgen CLK_TOP_EMMC_400M_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_NET1PLL_D5_D2>,
<&apmixedsys CLK_APMIXED_MSDCPLL>;
clock-names = "source",
"hclk",
"axi_cg",
"ahb_cg";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
tphy: tphy@11c50000 {
compatible = "mediatek,mt7988",
"mediatek,generic-tphy-v2";
@ -1108,6 +1007,28 @@
};
};
xfi_pextp0: xfi-pextp@11f20000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_0",
"syscon";
reg = <0 0x11f20000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pextp1: xfi-pextp@11f30000 {
compatible = "mediatek,mt7988-xfi-pextp",
"mediatek,mt7988-xfi-pextp_1",
"syscon";
reg = <0 0x11f30000 0 0x10000>;
#clock-cells = <1>;
};
xfi_pll: xfi-pll@11f40000 {
compatible = "mediatek,mt7988-xfi-pll", "syscon";
reg = <0 0x11f40000 0 0x1000>;
#clock-cells = <1>;
};
efuse: efuse@11f50000 {
compatible = "mediatek,efuse";
reg = <0 0x11f50000 0 0x1000>;
@ -1437,5 +1358,84 @@
};
};
};
crypto: crypto@15600000 {
compatible = "inside-secure,safexcel-eip197b";
reg = <0 0x15600000 0 0x180000>;
interrupts = <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ring0", "ring1", "ring2", "ring3";
status = "okay";
};
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay-passive = <1000>;
polling-delay = <1000>;
thermal-sensors = <&lvts 0>;
trips {
cpu_trip_crit: crit {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
cpu_trip_hot: hot {
temperature = <120000>;
hysteresis = <2000>;
type = "hot";
};
cpu_trip_active_high: active-high {
temperature = <115000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_med: active-med {
temperature = <85000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_med>;
};
cpu-passive {
/* passive: set fan to cooling level 0 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
};
};
};
timer {
compatible = "arm,armv8-timer";
interrupt-parent = <&gic>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
};

10
target/linux/mediatek/filogic/base-files/etc/board.d/01_leds
View File

@ -26,6 +26,13 @@ netgear,wax220)
ucidef_set_led_netdev "wlan2g" "WLAN2G" "blue:wlan2g" "phy0-ap0"
ucidef_set_led_netdev "wlan5g" "WLAN5G" "blue:wlan5g" "phy1-ap0"
;;
routerich,ax3000)
ucidef_set_led_netdev "lan-1" "lan-1" "blue:lan-1" "lan1" "link tx rx"
ucidef_set_led_netdev "lan-2" "lan-2" "blue:lan-2" "lan2" "link tx rx"
ucidef_set_led_netdev "lan-3" "lan-3" "blue:lan-3" "lan3" "link tx rx"
ucidef_set_led_netdev "wan" "wan" "blue:wan" "wan" "link tx rx"
ucidef_set_led_netdev "wan-off" "wan-off" "red:wan" "wan" "link"
;;
xiaomi,mi-router-wr30u-112m-nmbm|\
xiaomi,mi-router-wr30u-stock|\
xiaomi,mi-router-wr30u-ubootmod)
@ -35,6 +42,9 @@ xiaomi,redmi-router-ax6000-stock|\
xiaomi,redmi-router-ax6000-ubootmod)
ucidef_set_led_netdev "wan" "wan" "rgb:network" "wan"
;;
zbtlink,zbt-z8103ax)
ucidef_set_led_netdev "wan" "wan" "green:wan" "eth1" "link tx rx"
;;
zyxel_ex5601-t0-stock|\
zyxel,ex5601-t0-ubootmod)
ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0" "link tx rx"

20
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -14,6 +14,15 @@ mediatek_setup_interfaces()
acer,predator-w6)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
;;
asus,rt-ax59u|\
cetron,ct3003|\
confiabits,mt7981|\
cudy,wr3000-v1|\
jcg,q30-pro|\
qihoo,360t7|\
routerich,ax3000)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
asus,tuf-ax4200|\
mediatek,mt7981-rfb|\
zbtlink,zbt-z8102ax)
@ -25,15 +34,9 @@ mediatek_setup_interfaces()
bananapi,bpi-r3)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;;
cetron,ct3003|\
confiabits,mt7981|\
cudy,wr3000-v1|\
jcg,q30-pro|\
qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
cmcc,rax3000m|\
h3c,magic-nx30-pro)
h3c,magic-nx30-pro|\
zbtlink,zbt-z8103ax)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" eth1
;;
glinet,gl-mt2500|\
@ -94,6 +97,7 @@ mediatek_setup_macs()
local label_mac=""
case $board in
asus,rt-ax59u|\
asus,tuf-ax4200|\
asus,tuf-ax6000)
CI_UBIPART="UBI_DEV"

1
target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
View File

@ -59,6 +59,7 @@ case "$FIRMWARE" in
;;
"mediatek/mt7986_eeprom_mt7976_dbdc.bin")
case "$board" in
asus,rt-ax59u|\
asus,tuf-ax4200)
CI_UBIPART="UBI_DEV"
caldata_extract_ubi "Factory" 0x0 0x1000

12
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -16,6 +16,16 @@ case "$board" in
[ "$PHYNBR" = "1" ] && cat $key_path/6gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "2" ] && cat $key_path/5gMAC > /sys${DEVPATH}/macaddress
;;
asus,rt-ax59u)
CI_UBIPART="UBI_DEV"
addr=$(mtd_get_mac_binary_ubi "Factory" 0x4)
# Originally, phy1 is phy0 mac with LA and 28th bits set. However, this would conflict
# addresses on multiple VIFs with the other radio when bit 28 is already set.
# Set LA and 28 bits and increment mac-address instead.
[ "$PHYNBR" = "1" ] && \
macaddr_setbit_la $(macaddr_setbit $(macaddr_add $addr 1) 28) > \
/sys${DEVPATH}/macaddress
;;
asus,tuf-ax4200|\
asus,tuf-ax6000)
CI_UBIPART="UBI_DEV"
@ -104,7 +114,9 @@ case "$board" in
[ "$PHYNBR" = "0" ] && echo "$addr" > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
;;
routerich,ax3000|\
zbtlink,zbt-z8102ax|\
zbtlink,zbt-z8103ax|\
zyxel,ex5601-t0|\
zyxel,ex5601-t0-ubootmod)
addr=$(mtd_get_mac_binary "Factory" 0x4)

17
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -1,5 +1,16 @@
REQUIRE_IMAGE_METADATA=1
asus_initial_setup()
{
# initialize UBI if it's running on initramfs
[ "$(rootfs_type)" = "tmpfs" ] || return 0
ubirmvol /dev/ubi0 -N rootfs
ubirmvol /dev/ubi0 -N rootfs_data
ubirmvol /dev/ubi0 -N jffs2
ubimkvol /dev/ubi0 -N jffs2 -s 0x3e000
}
xiaomi_initial_setup()
{
# initialize UBI and setup uboot-env if it's running on initramfs
@ -60,6 +71,7 @@ platform_do_upgrade() {
CI_ROOTPART="rootfs"
emmc_do_upgrade "$1"
;;
asus,rt-ax59u|\
asus,tuf-ax4200|\
asus,tuf-ax6000)
CI_UBIPART="UBI_DEV"
@ -194,6 +206,11 @@ platform_pre_upgrade() {
local board=$(board_name)
case "$board" in
asus,rt-ax59u|\
asus,tuf-ax4200|\
asus,tuf-ax6000)
asus_initial_setup
;;
xiaomi,mi-router-wr30u-stock|\
xiaomi,redmi-router-ax6000-stock)
xiaomi_initial_setup

42
target/linux/mediatek/image/filogic.mk
View File

@ -175,6 +175,16 @@ $(call Device/adtran_smartrg)
endef
TARGET_DEVICES += smartrg_sdg-8632
define Device/asus_rt-ax59u
DEVICE_VENDOR := ASUS
DEVICE_MODEL := RT-AX59U
DEVICE_DTS := mt7986a-asus-rt-ax59u
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-usb3 kmod-mt7986-firmware mt7986-wo-firmware
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += asus_rt-ax59u
define Device/asus_tuf-ax4200
DEVICE_VENDOR := ASUS
DEVICE_MODEL := TUF-AX4200
@ -324,7 +334,7 @@ define Device/confiabits_mt7981
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-usb3 kmod-mt7981-firmware
DEVICE_PACKAGES := kmod-usb3 kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += confiabits_mt7981
@ -343,7 +353,7 @@ define Device/cudy_wr3000-v1
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | check-size | append-metadata
DEVICE_PACKAGES := kmod-mt7981-firmware
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += cudy_wr3000-v1
@ -653,6 +663,17 @@ define Device/qihoo_360t7
endef
TARGET_DEVICES += qihoo_360t7
define Device/routerich_ax3000
DEVICE_VENDOR := Routerich
DEVICE_MODEL := AX3000
DEVICE_DTS := mt7981b-routerich-ax3000
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
endef
TARGET_DEVICES += routerich_ax3000
define Device/tplink_tl-xdr-common
DEVICE_VENDOR := TP-Link
DEVICE_DTS_DIR := ../dts
@ -831,6 +852,23 @@ define Device/zbtlink_zbt-z8102ax
endef
TARGET_DEVICES += zbtlink_zbt-z8102ax
define Device/zbtlink_zbt-z8103ax
DEVICE_VENDOR := Zbtlink
DEVICE_MODEL := ZBT-Z8103AX
DEVICE_DTS := mt7981b-zbtlink-zbt-z8103ax
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
KERNEL_IN_UBI := 1
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += zbtlink_zbt-z8103ax
define Device/zyxel_ex5601-t0-stock
DEVICE_VENDOR := Zyxel
DEVICE_MODEL := EX5601-T0

40
target/linux/mediatek/image/mt7622.mk
View File

@ -37,9 +37,15 @@ define Build/bl31-uboot
cat $(STAGING_DIR_IMAGE)/mt7622_$1-u-boot.fip >> $@
endef
# Append header to a D-Link M32 Kernel 1 partition
define Build/m32-recovery-header-kernel1
echo -en "DLK6E6010001\x00\x00\xCF\x33" > "$@.header"
# Append header to a D-Link M32/R32 Kernel 1 partition
define Build/m32-r32-recovery-header-kernel1
$(eval header_start=$(word 1,$(1)))
# create $@.header without the checksum
echo -en "$(header_start)\x00\x00" > "$@.header"
# Calculate checksum over data area ($@) and append it to the header.
# The checksum is the 2byte-sum over the whole data area.
# Every overflow during the checksum calculation must increment the current checksum value by 1.
od -v -w2 -tu2 -An --endian little "$@" | awk '{ s+=$$1; } END { s%=65535; printf "%c%c",s%256,s/256; }' >> "$@.header"
echo -en "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x8D\x57\x30\x0B" >> "$@.header"
# Byte 0-3: Erase Start 0x002C0000
# Byte 4-7: Erase Length 0x02D00000
@ -48,9 +54,11 @@ define Build/m32-recovery-header-kernel1
echo -en "\x00\x00\x2C\x00\x00\x00\xD0\x02\x00\x00\x2C\x00\x00\x00\xD0\x02" >> "$@.header"
# Only zeros
echo -en "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" >> "$@.header"
# Note: The last 2 bytes of the following line are the checksum of the header
# If any data in the header will be changed, the checksum must be re-calculated
echo -en "\x42\x48\x02\x00\x00\x00\x08\x00\x00\x00\x00\x00\x60\x6E\x68\x61" >> "$@.header"
# Last 16 bytes, but without checksum
echo -en "\x42\x48\x02\x00\x00\x00\x08\x00\x00\x00\x00\x00\x60\x6E" >> "$@.header"
# Calculate and append checksum: The checksum must be set so that the 2byte-sum of the whole header is 0.
# Every overflow during the checksum calculation must increment the current checksum value by 1.
od -v -w2 -tu2 -An --endian little "$@.header" | awk '{s+=65535-$$1;}END{s%=65535;printf "%c%c",s%256,s/256;}' >> "$@.header"
cat "$@.header" "$@" > "$@.new"
mv "$@.new" "$@"
rm "$@.header"
@ -168,12 +176,10 @@ define Device/buffalo_wsr-3200ax4s
endef
TARGET_DEVICES += buffalo_wsr-3200ax4s
define Device/dlink_eagle-pro-ai-m32-a1
define Device/dlink_eagle-pro-ai-ax3200-a1
IMAGE_SIZE := 46080k
DEVICE_VENDOR := D-Link
DEVICE_MODEL := EAGLE PRO AI M32
DEVICE_VARIANT := A1
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-m32-a1
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915-firmware
KERNEL_SIZE := 8192k
@ -183,10 +189,24 @@ define Device/dlink_eagle-pro-ai-m32-a1
IMAGES += tftp.bin recovery.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
IMAGE/tftp.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | check-size
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-recovery-header-kernel1
endef
define Device/dlink_eagle-pro-ai-m32-a1
$(Device/dlink_eagle-pro-ai-ax3200-a1)
DEVICE_MODEL := EAGLE PRO AI M32
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-m32-a1
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-r32-recovery-header-kernel1 DLK6E6010001
endef
TARGET_DEVICES += dlink_eagle-pro-ai-m32-a1
define Device/dlink_eagle-pro-ai-r32-a1
$(Device/dlink_eagle-pro-ai-ax3200-a1)
DEVICE_MODEL := EAGLE PRO AI R32
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-r32-a1
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-r32-recovery-header-kernel1 DLK6E6015001
endef
TARGET_DEVICES += dlink_eagle-pro-ai-r32-a1
define Device/elecom_wrc-2533gent
DEVICE_VENDOR := Elecom
DEVICE_MODEL := WRC-2533GENT

5
target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
View File

@ -10,6 +10,7 @@ mediatek_setup_interfaces()
case $board in
bananapi,bpi-r64|\
buffalo,wsr-3200ax4s|\
dlink,eagle-pro-ai-r32-a1|\
elecom,wrc-x3200gst3|\
linksys,e8450|\
linksys,e8450-ubi|\
@ -64,10 +65,6 @@ mediatek_setup_macs()
wan_mac=$lan_mac
label_mac=$lan_mac
;;
dlink,eagle-pro-ai-m32-a1)
wan_mac=$(get_mac_label)
lan_mac=$(macaddr_add $(get_mac_label) 1)
;;
reyee,ax3200-e5|\
ruijie,rg-ew3200gx-pro)
lan_mac=$(macaddr_add $(get_mac_label) 1)

4
target/linux/mediatek/mt7622/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -18,10 +18,6 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $basemac 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $basemac 8 > /sys${DEVPATH}/macaddress
;;
dlink,eagle-pro-ai-m32-a1)
[ "$PHYNBR" = "0" ] && macaddr_add $(cat /sys/class/net/eth0/address) 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $(cat /sys/class/net/eth0/address) 3 > /sys${DEVPATH}/macaddress
;;
reyee,ax3200-e5|\
ruijie,rg-ew3200gx-pro)
[ "$PHYNBR" = "0" ] && macaddr_add $(get_mac_label) 3 > /sys${DEVPATH}/macaddress

8
target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
View File

@ -4,6 +4,14 @@ START=99
boot() {
case $(board_name) in
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1)
if grep -q boot_part=Kernel1 /proc/cmdline; then
fw_setenv boot_part 1
else
fw_setenv boot_part 2
fi
;;
linksys,e8450)
mtd erase senv || true
;;

4
target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
View File

@ -35,6 +35,7 @@ platform_do_upgrade() {
fi
;;
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1|\
elecom,wrc-x3200gst3|\
mediatek,mt7622-rfb1-ubi|\
netgear,wax206|\
@ -73,7 +74,8 @@ platform_check_image() {
buffalo,wsr-3200ax4s)
buffalo_check_image "$board" "$magic" "$1" || return 1
;;
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1|\
elecom,wrc-x3200gst3|\
mediatek,mt7622-rfb1-ubi|\
netgear,wax206|\

2
target/linux/mpc85xx/files/arch/powerpc/boot/dts/ws-ap3825i.dts
View File

@ -312,7 +312,7 @@
#size-cells = <2>;
ranges;
cpu1-bootpage@e000000 {
cpu1-bootpage@ff00000 {
/* Reserve upper 1 MB for second-core-bootpage */
reg = <0x0 0xff00000 0x0 0x100000>;
};

4
target/linux/oxnas/patches-5.15/340-oxnas-pcie.patch
View File

@ -38,7 +38,7 @@
};
};
+
+ pcie0: pcie-controller@47c00000 {
+ pcie0: pcie@47c00000 {
+ compatible = "plxtech,nas782x-pcie";
+ device_type = "pci";
+ #address-cells = <3>;
@ -78,7 +78,7 @@
+ status = "disabled";
+ };
+
+ pcie1: pcie-controller@47e00000 {
+ pcie1: pcie@47e00000 {
+ compatible = "plxtech,nas782x-pcie";
+ device_type = "pci";
+ #address-cells = <3>;

2
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts
View File

@ -123,7 +123,7 @@
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "ok";
status = "okay";
m25p80@0 {
#address-cells = <1>;

5
target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts
View File

@ -267,8 +267,9 @@
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT6)>;
switch_wan_bmp = <ESS_PORT5>;
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4 | ESS_PORT5)>;
switch_wan_bmp = <ESS_PORT6>;
malibu_first_phy_addr = <0x18>;
switch_mac_mode = <MAC_MODE_QSGMII>;
switch_mac_mode1 = <MAC_MODE_USXGMII>;
switch_mac_mode2 = <MAC_MODE_USXGMII>;

12
target/linux/ramips/dts/mt7620a.dtsi
View File

@ -74,9 +74,6 @@
compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -115,9 +109,6 @@
compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
@ -285,9 +276,6 @@
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
resets = <&sysc 28>;
reset-names = "intc";
interrupt-parent = <&cpuintc>;
interrupts = <7>;
};

12
target/linux/ramips/dts/mt7620n.dtsi
View File

@ -74,9 +74,6 @@
compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -99,9 +93,6 @@
compatible = "ralink,mt7620a-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
@ -247,9 +238,6 @@
compatible = "ralink,mt7620a-systick", "ralink,cevt-systick";
reg = <0xd00 0x10>;
resets = <&sysc 28>;
reset-names = "intc";
interrupt-parent = <&cpuintc>;
interrupts = <7>;
};

11
target/linux/ramips/dts/mt7621.dtsi
View File

@ -120,17 +120,6 @@
status = "disabled";
};
systick: systick@500 {
compatible = "ralink,mt7621-systick", "ralink,cevt-systick";
reg = <0x500 0x10>;
resets = <&sysc MT7621_RST_AUX_STCK>;
reset-names = "intc";
interrupt-parent = <&gic>;
interrupts = <GIC_SHARED 5 IRQ_TYPE_LEVEL_HIGH>;
};
memc: memory-controller@5000 {
compatible = "mediatek,mt7621-memc", "syscon";
reg = <0x5000 0x1000>;

2
target/linux/ramips/dts/mt7621_unielec_u7621-01-16m.dts
View File

@ -13,7 +13,7 @@
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <14000000>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";

13
target/linux/ramips/dts/mt7621_unielec_u7621-01.dtsi
View File

@ -50,27 +50,26 @@
status = "okay";
};
&pcie0 {
&pcie1 { // MT7603EN
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <2400000 2500000>;
led {
led-active-low;
};
};
};
&pcie1 {
&pcie2 { // MT7612E
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
};
};
};

17
target/linux/ramips/dts/mt7628an.dtsi
View File

@ -55,9 +55,6 @@
compatible = "ralink,mt7628an-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 9>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -73,9 +70,6 @@
compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 10>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -220,9 +214,6 @@
reg = <0x5000 0x1000>;
#pwm-cells = <2>;
resets = <&sysc 31>;
reset-names = "pwm";
pinctrl-names = "default";
pinctrl-0 = <&pwm0_pins>, <&pwm1_pins>;
@ -420,8 +411,8 @@
interrupt-parent = <&cpuintc>;
interrupts = <5>;
resets = <&sysc 21>;
reset-names = "fe";
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
mediatek,switch = <&esw>;
};
@ -430,8 +421,8 @@
compatible = "mediatek,mt7628-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&sysc 23>, <&sysc 24>;
reset-names = "esw", "ephy";
resets = <&sysc 24>;
reset-names = "ephy";
interrupt-parent = <&intc>;
interrupts = <17>;

2
target/linux/ramips/dts/mt7628an_xiaomi_mi-ra75.dts
View File

@ -10,7 +10,7 @@
led-failsafe = &led_system_amber;
led-running = &led_system_blue;
led-upgrade = &led_system_amber;
label-mac-device = &ethernet;
label-mac-device = &wmac;
};
leds {

17
target/linux/ramips/dts/rt3050.dtsi
View File

@ -73,9 +73,6 @@
compatible = "ralink,rt3050-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -87,9 +84,6 @@
compatible = "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -123,9 +117,6 @@
20 24 28 2c
30 34 ];
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
};
@ -310,8 +301,8 @@
clocks = <&sysc 11>;
resets = <&sysc 21>;
reset-names = "fe";
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
interrupt-parent = <&cpuintc>;
interrupts = <5>;
@ -323,8 +314,8 @@
compatible = "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&sysc 23>, <&sysc 24>;
reset-names = "esw", "ephy";
resets = <&sysc 24>;
reset-names = "ephy";
interrupt-parent = <&intc>;
interrupts = <17>;

13
target/linux/ramips/dts/rt3352.dtsi
View File

@ -85,9 +85,6 @@
compatible = "ralink,rt3352-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -120,8 +117,6 @@
ralink,register-map = [ 00 04 08 0c
20 24 28 2c
30 34 ];
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
@ -324,8 +319,8 @@
clocks = <&sysc 12>;
resets = <&sysc 21>;
reset-names = "fe";
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
interrupt-parent = <&cpuintc>;
interrupts = <5>;
@ -337,8 +332,8 @@
compatible = "ralink,rt3352-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&sysc 23>, <&sysc 24>;
reset-names = "esw", "ephy";
resets = <&sysc 24>;
reset-names = "ephy";
interrupt-parent = <&intc>;
interrupts = <17>;

9
target/linux/ramips/dts/rt3883.dtsi
View File

@ -74,9 +74,6 @@
compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -115,9 +109,6 @@
compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;

17
target/linux/ramips/dts/rt5350.dtsi
View File

@ -74,9 +74,6 @@
compatible = "ralink,rt5350-intc", "ralink,rt2880-intc";
reg = <0x200 0x100>;
resets = <&sysc 19>;
reset-names = "intc";
interrupt-controller;
#interrupt-cells = <1>;
@ -88,9 +85,6 @@
compatible = "ralink,rt5350-memc", "ralink,rt3050-memc";
reg = <0x300 0x100>;
resets = <&sysc 20>;
reset-names = "mc";
interrupt-parent = <&intc>;
interrupts = <3>;
};
@ -115,9 +109,6 @@
compatible = "ralink,rt5350-gpio", "ralink,rt2880-gpio";
reg = <0x600 0x34>;
resets = <&sysc 13>;
reset-names = "pio";
interrupt-parent = <&intc>;
interrupts = <6>;
@ -349,8 +340,8 @@
clocks = <&sysc 12>;
resets = <&sysc 21>;
reset-names = "fe";
resets = <&sysc 21>, <&sysc 23>;
reset-names = "fe", "esw";
interrupt-parent = <&cpuintc>;
interrupts = <5>;
@ -362,8 +353,8 @@
compatible = "ralink,rt5350-esw", "ralink,rt3050-esw";
reg = <0x10110000 0x8000>;
resets = <&sysc 23>, <&sysc 24>;
reset-names = "esw", "ephy";
resets = <&sysc 24>;
reset-names = "ephy";
interrupt-parent = <&intc>;
interrupts = <17>;

24
target/linux/ramips/files/drivers/net/ethernet/ralink/esw_rt3050.c
View File

@ -237,7 +237,6 @@ struct rt305x_esw {
int led_frequency;
struct esw_vlan vlans[RT305X_ESW_NUM_VLANS];
struct esw_port ports[RT305X_ESW_NUM_PORTS];
struct reset_control *rst_esw;
struct reset_control *rst_ephy;
};
@ -261,18 +260,6 @@ static inline void esw_rmw_raw(struct rt305x_esw *esw, unsigned reg,
__raw_writel(t | val, esw->base + reg);
}
static void esw_reset(struct rt305x_esw *esw)
{
if (!esw->rst_esw)
return;
reset_control_assert(esw->rst_esw);
usleep_range(60, 120);
reset_control_deassert(esw->rst_esw);
/* the esw takes long to reset otherwise the board hang */
msleep(10);
}
static void esw_reset_ephy(struct rt305x_esw *esw)
{
if (!esw->rst_ephy)
@ -466,8 +453,6 @@ static void esw_hw_init(struct rt305x_esw *esw)
u8 port_disable = 0;
u8 port_map = RT305X_ESW_PMAP_LLLLLL;
esw_reset(esw);
/* vodoo from original driver */
esw_w32(esw, 0xC8A07850, RT305X_ESW_REG_FCT0);
esw_w32(esw, 0x00000000, RT305X_ESW_REG_SGC2);
@ -1441,12 +1426,11 @@ static int esw_probe(struct platform_device *pdev)
if (reg_init)
esw->reg_led_source = be32_to_cpu(*reg_init);
esw->rst_esw = devm_reset_control_get(&pdev->dev, "esw");
if (IS_ERR(esw->rst_esw))
esw->rst_esw = NULL;
esw->rst_ephy = devm_reset_control_get(&pdev->dev, "ephy");
if (IS_ERR(esw->rst_ephy))
esw->rst_ephy = devm_reset_control_get_exclusive(&pdev->dev, "ephy");
if (IS_ERR(esw->rst_ephy)) {
dev_err(esw->dev, "failed to get EPHY reset: %pe\n", esw->rst_ephy);
esw->rst_ephy = NULL;
}
spin_lock_init(&esw->reg_rw_lock);
platform_set_drvdata(pdev, esw);

16
target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.c
View File

@ -143,13 +143,13 @@ void fe_reset(u32 reset_bits)
void fe_reset_fe(struct fe_priv *priv)
{
if (!priv->rst_fe)
if (!priv->resets)
return;
reset_control_assert(priv->rst_fe);
usleep_range(60, 120);
reset_control_deassert(priv->rst_fe);
reset_control_assert(priv->resets);
usleep_range(60, 120);
reset_control_deassert(priv->resets);
usleep_range(1000, 1200);
}
static inline void fe_int_disable(u32 mask)
@ -1595,9 +1595,11 @@ static int fe_probe(struct platform_device *pdev)
priv = netdev_priv(netdev);
spin_lock_init(&priv->page_lock);
priv->rst_fe = devm_reset_control_get(&pdev->dev, "fe");
if (IS_ERR(priv->rst_fe))
priv->rst_fe = NULL;
priv->resets = devm_reset_control_array_get_exclusive(&pdev->dev);
if (IS_ERR(priv->resets)) {
dev_err(&pdev->dev, "Failed to get resets for FE and ESW cores: %pe\n", priv->resets);
priv->resets = NULL;
}
if (soc->init_data)
soc->init_data(soc, netdev);

3
target/linux/ramips/files/drivers/net/ethernet/ralink/mtk_eth_soc.h
View File

@ -497,8 +497,7 @@ struct fe_priv {
struct work_struct pending_work;
DECLARE_BITMAP(pending_flags, FE_FLAG_MAX);
struct reset_control *rst_ppe;
struct reset_control *rst_fe;
struct reset_control *resets;
struct mtk_foe_entry *foe_table;
dma_addr_t foe_table_phys;
struct flow_offload __rcu **foe_flow_table;

33
target/linux/ramips/image/lzma-loader/src/board.c
View File

@ -11,22 +11,39 @@
*/
#include <stdint.h>
#include <stddef.h>
#define KSEG0 0x80000000
#define KSEG1 0xa0000000
#define _ATYPE_ __PTRDIFF_TYPE__
#define _ATYPE32_ int
#define _ACAST32_ (_ATYPE_)(_ATYPE32_)
#define CPHYSADDR(a) ((_ACAST32_(a)) & 0x1fffffff)
#define KSEG0ADDR(a) (CPHYSADDR(a) | KSEG0)
#define KSEG1ADDR(a) (CPHYSADDR(a) | KSEG1)
#define UART_LSR_THRE 0x20
#define UART_LSR_TEMT 0x40
#if defined(SOC_MT7620) || defined(SOC_RT3883)
#define UART_BASE 0xb0000c00
#define UART_BASE KSEG1ADDR(0x10000c00)
#define UART_THR (UART_BASE + 0x04)
#define UART_LSR (UART_BASE + 0x1c)
#define UART_LSR_THRE_MASK 0x40
#define UART_LSR_MASK UART_LSR_TEMT
#elif defined(SOC_MT7621)
#define UART_BASE 0xbe000c00
#define UART_BASE KSEG1ADDR(0x1e000c00)
#define UART_THR (UART_BASE + 0x00)
#define UART_LSR (UART_BASE + 0x14)
#define UART_LSR_THRE_MASK 0x20
#define UART_LSR_MASK UART_LSR_THRE
#elif defined(SOC_RT305X)
#define UART_BASE 0x10000500
#define UART_BASE KSEG1ADDR(0x10000c00)
#define UART_THR (UART_BASE + 0x04)
#define UART_LSR (UART_BASE + 0x1c)
#define UART_LSR_THRE_MASK 0x20
#define UART_LSR_MASK UART_LSR_THRE
#else
#error "Unsupported SOC..."
#endif
@ -42,7 +59,7 @@ void board_init(void)
void board_putc(int ch)
{
while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
while ((READREG(UART_LSR) & UART_LSR_MASK) == 0);
WRITEREG(UART_THR, ch);
while ((READREG(UART_LSR) & UART_LSR_THRE_MASK) == 0);
while ((READREG(UART_LSR) & UART_LSR_MASK) == 0);
}

14
target/linux/realtek/dts-5.15/rtl838x_hpe_1920.dtsi
View File

@ -50,43 +50,43 @@
read-only;
};
partition@0x60000 {
partition@60000 {
label = "bootware_data";
reg = <0x60000 0x30000>;
read-only;
};
partition@0x90000 {
partition@90000 {
label = "bootware_extend";
reg = <0x90000 0x40000>;
read-only;
};
partition@0x100000 {
partition@100000 {
label = "bootware_basic_backup";
reg = <0x100000 0x50000>;
read-only;
};
partition@0x160000 {
partition@160000 {
label = "bootware_data_backup";
reg = <0x160000 0x30000>;
read-only;
};
partition@0x190000 {
partition@190000 {
label = "bootware_extend_backup";
reg = <0x190000 0x40000>;
read-only;
};
partition@0x300000 {
partition@300000 {
label = "firmware";
compatible = "h3c,vfs-firmware";
reg = <0x300000 0x1cf0000>;
};
partition@0x1ff0000 {
partition@1ff0000 {
label = "factory";
reg = <0x1ff0000 0x10000>;
read-only;

4
target/linux/realtek/dts-5.15/rtl9302_zyxel_xgs1250-12.dts
View File

@ -29,7 +29,7 @@
};
/* i2c of the SFP cage: port 12 */
i2c0: i2c-rtl9300 {
i2c0: i2c-rtl9300@1b00036c {
compatible = "realtek,rtl9300-i2c";
reg = <0x1b00036c 0x3c>;
#address-cells = <1>;
@ -62,7 +62,7 @@
tx-disable-gpio = <&gpio0 15 GPIO_ACTIVE_HIGH>;
};
led_set: led_set@0 {
led_set: led_set {
compatible = "realtek,rtl9300-leds";
active-low;

2
target/linux/realtek/files-5.15/drivers/net/dsa/rtl83xx/debugfs.c
View File

@ -605,7 +605,7 @@ void rtl838x_dbgfs_init(struct rtl838x_switch_priv *priv)
priv->dbgfs_dir = rtl838x_dir;
debugfs_create_u32("soc", 0444, rtl838x_dir,
debugfs_create_x32("soc", 0444, rtl838x_dir,
(u32 *)(RTL838X_SW_BASE + RTL838X_MODEL_NAME_INFO));
/* Create one directory per port */