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ramips: change CM_GCR_BASE_CMDEFTGT_MEM value to match datasheet

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Zero config value for default memory region means 'memory', not
not 'disabled' according to 'Control Registers Of The Coherency
Manager' manual.

Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>

SVN-Revision: 47906
This commit is contained in:
John Crispin 2015-12-17 09:26:51 +00:00
parent acbed0eff3
commit 43422a634b
1 changed files with 12 additions and 0 deletions
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12
target/linux/ramips/patches-4.3/0063-set-CM_GCR_BASE_CMDEFTGT_MEM-according-to-datasheet.patch Normal file
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@ -0,0 +1,12 @@
--- a/arch/mips/include/asm/mips-cm.h
+++ b/arch/mips/include/asm/mips-cm.h
@@ -225,8 +225,7 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
#define CM_GCR_BASE_GCRBASE_MSK (_ULCAST_(0x1ffff) << 15)
#define CM_GCR_BASE_CMDEFTGT_SHF 0
#define CM_GCR_BASE_CMDEFTGT_MSK (_ULCAST_(0x3) << 0)
-#define CM_GCR_BASE_CMDEFTGT_DISABLED 0
-#define CM_GCR_BASE_CMDEFTGT_MEM 1
+#define CM_GCR_BASE_CMDEFTGT_MEM 0
#define CM_GCR_BASE_CMDEFTGT_IOCU0 2
#define CM_GCR_BASE_CMDEFTGT_IOCU1 3