ipq806x: Bring missing patches from 5.4 to 5.10

Kernel 5.10 support for ipq806x was added at the same time that these
patches were developed for kernel 5.4. This carries the patches forward
to kernel 5.10.

fa731838c5 ipq806x: dwmac: clear forced speed during probe
75ca641f1b ipq806x: Add "snps,dwmac" to all gmac compatible=
d62825dd77 ipq806x: dwmac: set forced speed when using fixed-link

Signed-off-by: Mark Mentovai <mark@moxienet.com>
Run-tested: ipq806x/ubnt,unifi-ac-hd
Cc: Ansuel Smith <ansuelsmth@gmail.com>
This commit is contained in:
Mark Mentovai 2021-05-08 14:24:53 -04:00 committed by Petr Štetiar
parent a1afeb9270
commit 62850e7a77
2 changed files with 119 additions and 0 deletions

View File

@ -141,6 +141,42 @@
};
tcsr: syscon@1a400000 {
@@ -622,7 +649,7 @@
gmac0: ethernet@37000000 {
device_type = "network";
- compatible = "qcom,ipq806x-gmac";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37000000 0x200000>;
interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -645,7 +672,7 @@
gmac1: ethernet@37200000 {
device_type = "network";
- compatible = "qcom,ipq806x-gmac";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37200000 0x200000>;
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -668,7 +695,7 @@
gmac2: ethernet@37400000 {
device_type = "network";
- compatible = "qcom,ipq806x-gmac";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37400000 0x200000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -691,7 +718,7 @@
gmac3: ethernet@37600000 {
device_type = "network";
- compatible = "qcom,ipq806x-gmac";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
reg = <0x37600000 0x200000>;
interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
@@ -740,13 +767,13 @@
qcom,ee = <0>;
};

View File

@ -0,0 +1,83 @@
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-ipq806x.c
@@ -64,6 +64,17 @@
#define NSS_COMMON_CLK_DIV_SGMII_100 4
#define NSS_COMMON_CLK_DIV_SGMII_10 49
+#define QSGMII_PCS_ALL_CH_CTL 0x80
+#define QSGMII_PCS_CH_SPEED_FORCE 0x2
+#define QSGMII_PCS_CH_SPEED_10 0x0
+#define QSGMII_PCS_CH_SPEED_100 0x4
+#define QSGMII_PCS_CH_SPEED_1000 0x8
+#define QSGMII_PCS_CH_SPEED_MASK (QSGMII_PCS_CH_SPEED_FORCE | \
+ QSGMII_PCS_CH_SPEED_10 | \
+ QSGMII_PCS_CH_SPEED_100 | \
+ QSGMII_PCS_CH_SPEED_1000)
+#define QSGMII_PCS_CH_SPEED_SHIFT(x) (x * 4)
+
#define QSGMII_PCS_CAL_LCKDT_CTL 0x120
#define QSGMII_PCS_CAL_LCKDT_CTL_RST BIT(19)
@@ -241,6 +252,36 @@ static void ipq806x_gmac_fix_mac_speed(v
ipq806x_gmac_set_speed(gmac, speed);
}
+static int
+ipq806x_gmac_get_qsgmii_pcs_speed_val(struct platform_device *pdev) {
+ struct device_node *fixed_link_node;
+ int rv;
+ int fixed_link_speed;
+
+ if (!of_phy_is_fixed_link(pdev->dev.of_node))
+ return 0;
+
+ fixed_link_node = of_get_child_by_name(pdev->dev.of_node, "fixed-link");
+ if (!fixed_link_node)
+ return -1;
+
+ rv = of_property_read_u32(fixed_link_node, "speed", &fixed_link_speed);
+ of_node_put(fixed_link_node);
+ if (rv)
+ return -1;
+
+ switch (fixed_link_speed) {
+ case SPEED_1000:
+ return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_1000;
+ case SPEED_100:
+ return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_100;
+ case SPEED_10:
+ return QSGMII_PCS_CH_SPEED_FORCE | QSGMII_PCS_CH_SPEED_10;
+ }
+
+ return -1;
+}
+
static int ipq806x_gmac_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat_dat;
@@ -249,6 +290,7 @@ static int ipq806x_gmac_probe(struct pla
struct ipq806x_gmac *gmac;
int val;
int err;
+ int qsgmii_pcs_speed;
val = stmmac_get_platform_resources(pdev, &stmmac_res);
if (val)
@@ -345,6 +387,17 @@ static int ipq806x_gmac_probe(struct pla
0x1ul << QSGMII_PHY_RX_INPUT_EQU_OFFSET |
0x2ul << QSGMII_PHY_CDR_PI_SLEW_OFFSET |
0xCul << QSGMII_PHY_TX_DRV_AMP_OFFSET);
+
+ qsgmii_pcs_speed = ipq806x_gmac_get_qsgmii_pcs_speed_val(pdev);
+ if (qsgmii_pcs_speed != -1) {
+ regmap_update_bits(
+ gmac->qsgmii_csr,
+ QSGMII_PCS_ALL_CH_CTL,
+ QSGMII_PCS_CH_SPEED_MASK <<
+ QSGMII_PCS_CH_SPEED_SHIFT(gmac->id),
+ qsgmii_pcs_speed <<
+ QSGMII_PCS_CH_SPEED_SHIFT(gmac->id));
+ }
}
plat_dat->has_gmac = true;