ar71xx: add kernel support for dir-825-c1
[juhosg: - remove unused GPIO stuff - use a separate kernel patch for machine integration] Signed-off-by: Alexander Stadler <sa.maillists@univie.ac.at> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 35401
This commit is contained in:
Gabor Juhos
parent
316f53d066
commit
800da21cb1
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@ -39,6 +39,7 @@ CONFIG_ATH79_MACH_DB120=y
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CONFIG_ATH79_MACH_DIR_600_A1=y
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CONFIG_ATH79_MACH_DIR_615_C1=y
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CONFIG_ATH79_MACH_DIR_825_B1=y
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CONFIG_ATH79_MACH_DIR_825_C1=y
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CONFIG_ATH79_MACH_EAP7660D=y
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CONFIG_ATH79_MACH_EW_DORIN=y
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CONFIG_ATH79_MACH_HORNET_UB=y
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189
target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c
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189
target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c
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@ -0,0 +1,189 @@
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/*
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* D-Link DIR-825 rev. C1 board support
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*
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* Copyright (C) 2013 Alexander Stadler
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/pci.h>
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#include <linux/phy.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-ap9x-pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#define DIR825C1_GPIO_LED_BLUE_USB 11
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#define DIR825C1_GPIO_LED_ORANGE_POWER 15
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#define DIR825C1_GPIO_LED_BLUE_POWER 14
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#define DIR825C1_GPIO_LED_ORANGE_PLANET 19
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#define DIR825C1_GPIO_LED_BLUE_PLANET 18
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#define DIR825C1_GPIO_BTN_RESET 17
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#define DIR825C1_GPIO_BTN_WPS 16
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#define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */
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#define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL)
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#define DIR825C1_MAC0_OFFSET 0x4
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#define DIR825C1_MAC1_OFFSET 0x18
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#define DIR825C1_WMAC_CALDATA_OFFSET 0x1000
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#define DIR825C1_PCIE_CALDATA_OFFSET 0x5000
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static struct gpio_led dir825c1_leds_gpio[] __initdata = {
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{
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.name = "d-link:blue:usb",
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.gpio = DIR825C1_GPIO_LED_BLUE_USB,
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.active_low = 1,
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}, {
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.name = "d-link:orange:power",
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.gpio = DIR825C1_GPIO_LED_ORANGE_POWER,
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.active_low = 1,
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}, {
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.name = "d-link:blue:power",
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.gpio = DIR825C1_GPIO_LED_BLUE_POWER,
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.active_low = 1,
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}, {
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.name = "d-link:orange:planet",
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.gpio = DIR825C1_GPIO_LED_ORANGE_PLANET,
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.active_low = 1,
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}, {
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.name = "d-link:blue:planet",
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.gpio = DIR825C1_GPIO_LED_BLUE_PLANET,
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.active_low = 1,
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}
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};
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static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = {
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{
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.desc = "reset",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR825C1_GPIO_BTN_RESET,
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.active_low = 1,
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}, {
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.desc = "wps",
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.type = EV_KEY,
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.code = KEY_WPS_BUTTON,
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.debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = DIR825C1_GPIO_BTN_WPS,
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.active_low = 1,
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}
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};
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static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = {
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.mode = AR8327_PAD_MAC_RGMII,
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.txclk_delay_en = true,
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.rxclk_delay_en = true,
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.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
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.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
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};
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static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = {
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.led_ctrl0 = 0xc737c737,
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.led_ctrl1 = 0x00000000,
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.led_ctrl2 = 0x00000000,
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.led_ctrl3 = 0x0030c300,
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.open_drain = false,
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};
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static struct ar8327_platform_data dir825c1_ar8327_data = {
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.pad0_cfg = &dir825c1_ar8327_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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.led_cfg = &dir825c1_ar8327_led_cfg,
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};
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static struct mdio_board_info dir825c1_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &dir825c1_ar8327_data,
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},
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};
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static void dir825c1_read_ascii_mac(u8 *dest, u8 *src)
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{
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int ret;
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ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
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&dest[0], &dest[1], &dest[2],
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&dest[3], &dest[4], &dest[5]);
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if (ret != ETH_ALEN)
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memset(dest, 0, ETH_ALEN);
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}
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static void __init dir825c1_setup(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 tmpmac[ETH_ALEN];
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u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
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dir825c1_read_ascii_mac(mac1, mac + DIR825C1_MAC0_OFFSET);
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dir825c1_read_ascii_mac(mac2, mac + DIR825C1_MAC1_OFFSET);
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ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB, AR934X_GPIO_OUT_GPIO);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
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dir825c1_leds_gpio);
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ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(dir825c1_gpio_keys),
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dir825c1_gpio_keys);
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ap9x_pci_setup_wmac_led_pin(0, 13);
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ap9x_pci_setup_wmac_led_pin(1, 32);
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ath79_init_mac(tmpmac, mac1, 0);
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ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, tmpmac);
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ath79_init_mac(tmpmac, mac2, 0);
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ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, tmpmac);
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ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
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mdiobus_register_board_info(dir825c1_mdio0_info,
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ARRAY_SIZE(dir825c1_mdio0_info));
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 0);
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/* GMAC0 is connected to an AR8327N switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_eth0_pll_data.pll_1000 = 0x06000000;
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ath79_register_eth(0);
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ath79_register_usb();
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}
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MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1",
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"D-Link DIR-825 rev. C1",
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dir825c1_setup);
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@ -0,0 +1,40 @@
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--- a/arch/mips/ath79/machtypes.h
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+++ b/arch/mips/ath79/machtypes.h
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@@ -39,6 +39,7 @@ enum ath79_mach_type {
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ATH79_MACH_DIR_615_C1, /* D-Link DIR-615 rev. C1 */
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ATH79_MACH_DIR_615_E4, /* D-Link DIR-615 rev. E4 */
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ATH79_MACH_DIR_825_B1, /* D-Link DIR-825 rev. B1 */
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+ ATH79_MACH_DIR_825_C1, /* D-Link DIR-825 rev. C1 */
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ATH79_MACH_EW_DORIN, /* embedded wireless Dorin Platform */
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ATH79_MACH_EW_DORIN_ROUTER, /* embedded wireless Dorin Router Platform */
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ATH79_MACH_EAP7660D, /* Senao EAP7660D */
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -283,6 +283,17 @@ config ATH79_MACH_DIR_825_B1
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select ATH79_DEV_M25P80
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select ATH79_DEV_USB
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+config ATH79_MACH_DIR_825_C1
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+ bool "D-Link DIR-825 rev. C1 board support"
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+ select SOC_AR934X
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+ select ATH79_DEV_AP9X_PCI if PCI
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+ select ATH79_DEV_ETH
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+ select ATH79_DEV_GPIO_BUTTONS
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+ select ATH79_DEV_LEDS_GPIO
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+ select ATH79_DEV_M25P80
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+ select ATH79_DEV_USB
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+ select ATH79_DEV_WMAC
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+
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config ATH79_MACH_EW_DORIN
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bool "embedded wireless Dorin Platform support"
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select SOC_AR933X
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--- a/arch/mips/ath79/Makefile
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+++ b/arch/mips/ath79/Makefile
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@@ -55,6 +55,7 @@ obj-$(CONFIG_ATH79_MACH_DB120) += mach-
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obj-$(CONFIG_ATH79_MACH_DIR_600_A1) += mach-dir-600-a1.o
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obj-$(CONFIG_ATH79_MACH_DIR_615_C1) += mach-dir-615-c1.o
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obj-$(CONFIG_ATH79_MACH_DIR_825_B1) += mach-dir-825-b1.o
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+obj-$(CONFIG_ATH79_MACH_DIR_825_C1) += mach-dir-825-c1.o
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obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o
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obj-$(CONFIG_ATH79_MACH_EAP7660D) += mach-eap7660d.o
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obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o
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