adm5120: preliminary 2.6.32 support (closes: #6304)

SVN-Revision: 19005
This commit is contained in:
Gabor Juhos 2010-01-02 15:52:34 +00:00
parent e16f20b518
commit 89f3773ca4
16 changed files with 1305 additions and 0 deletions

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@ -0,0 +1,57 @@
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -20,6 +20,21 @@ choice
prompt "System type"
default SGI_IP22
+config ADM5120
+ bool "Infineon/ADMtek ADM5120 SoC based machines"
+ select CEVT_R4K
+ select CSRC_R4K
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select DMA_NONCOHERENT
+ select IRQ_CPU
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select ARCH_REQUIRE_GPIOLIB
+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN
+ select MIPS_MACHINE
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
@@ -673,6 +688,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
endchoice
+source "arch/mips/adm5120/Kconfig"
source "arch/mips/alchemy/Kconfig"
source "arch/mips/basler/excite/Kconfig"
source "arch/mips/bcm63xx/Kconfig"
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -191,6 +191,22 @@ cflags-$(CONFIG_MACH_JAZZ) += -I$(srctre
load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000
#
+# Infineon/ADMtek ADM5120
+#
+libs-$(CONFIG_ADM5120) += arch/mips/adm5120/prom/
+core-$(CONFIG_ADM5120) += arch/mips/adm5120/common/
+core-$(CONFIG_ADM5120_OEM_CELLVISION) += arch/mips/adm5120/cellvision/
+core-$(CONFIG_ADM5120_OEM_COMPEX) += arch/mips/adm5120/compex/
+core-$(CONFIG_ADM5120_OEM_EDIMAX) += arch/mips/adm5120/edimax/
+core-$(CONFIG_ADM5120_OEM_INFINEON) += arch/mips/adm5120/infineon/
+core-$(CONFIG_ADM5120_OEM_MIKROTIK) += arch/mips/adm5120/mikrotik/
+core-$(CONFIG_ADM5120_OEM_MOTOROLA) += arch/mips/adm5120/motorola/
+core-$(CONFIG_ADM5120_OEM_OSBRIDGE) += arch/mips/adm5120/osbridge/
+core-$(CONFIG_ADM5120_OEM_ZYXEL) += arch/mips/adm5120/zyxel/
+cflags-$(CONFIG_ADM5120) += -I$(srctree)/arch/mips/include/asm/mach-adm5120
+load-$(CONFIG_ADM5120) += 0xffffffff80001000
+
+#
# Common Alchemy Au1x00 stuff
#
core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/

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@ -0,0 +1,21 @@
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -557,4 +557,8 @@ config MTD_VMU
To build this as a module select M here, the module will be called
vmu-flash.
+config MTD_ADM5120
+ tristate "Map driver for ADM5120 based boards"
+ depends on ADM5120
+
endmenu
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash.
obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o
obj-$(CONFIG_MTD_PCI) += pci.o
obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o
+obj-$(CONFIG_MTD_ADM5120) += adm5120-flash.o
obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o
obj-$(CONFIG_MTD_EDB7312) += edb7312.o
obj-$(CONFIG_MTD_IMPA7) += impa7.o

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@ -0,0 +1,23 @@
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -602,6 +602,10 @@ config MIPS_AU1X00_ENET
If you have an Alchemy Semi AU1X00 based system
say Y. Otherwise, say N.
+config ADM5120_ENET
+ tristate "ADM5120 Ethernet switch support"
+ depends on ADM5120
+
config SGI_IOC3_ETH
bool "SGI IOC3 Ethernet"
depends on PCI && SGI_IP27
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -208,6 +208,7 @@ obj-$(CONFIG_SC92031) += sc92031.o
# This is also a 82596 and should probably be merged
obj-$(CONFIG_LP486E) += lp486e.o
+obj-$(CONFIG_ADM5120_ENET) += adm5120sw.o
obj-$(CONFIG_ETH16I) += eth16i.o
obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o
obj-$(CONFIG_HPLANCE) += hplance.o 7990.o

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@ -0,0 +1,33 @@
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_USB) += core/
obj-$(CONFIG_USB_MON) += mon/
obj-$(CONFIG_PCI) += host/
+obj-$(CONFIG_USB_ADM5120_HCD) += host/
obj-$(CONFIG_USB_EHCI_HCD) += host/
obj-$(CONFIG_USB_ISP116X_HCD) += host/
obj-$(CONFIG_USB_OHCI_HCD) += host/
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -4,6 +4,10 @@
comment "USB Host Controller Drivers"
depends on USB
+config USB_ADM5120_HCD
+ tristate "ADM5120 HCD support (EXPERIMENTAL)"
+ depends on USB && ADM5120 && EXPERIMENTAL
+
config USB_C67X00_HCD
tristate "Cypress C67x00 HCD support"
depends on USB
--- a/drivers/usb/host/Makefile
+++ b/drivers/usb/host/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_USB_WHCI_HCD) += whci/
obj-$(CONFIG_PCI) += pci-quirks.o
+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o
obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o
obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o
obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o

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@ -0,0 +1,22 @@
--- a/arch/mips/pci/Makefile
+++ b/arch/mips/pci/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capc
obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o
obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o
obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o
+obj-$(CONFIG_ADM5120) += pci-adm5120.o
ifdef CONFIG_PCI_MSI
obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1748,6 +1748,9 @@
#define PCI_VENDOR_ID_ESDGMBH 0x12fe
#define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111
+#define PCI_VENDOR_ID_ADMTEK 0x1317
+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120
+
#define PCI_VENDOR_ID_SIIG 0x131f
#define PCI_SUBVENDOR_ID_SIIG 0x131f
#define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000

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@ -0,0 +1,22 @@
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -315,4 +315,12 @@ config LEDS_TRIGGER_NETDEV
This allows LEDs to be controlled by network device activity.
If unsure, say Y.
+config LEDS_TRIGGER_ADM5120_SWITCH
+ tristate "LED ADM5120 Switch Port Status Trigger"
+ depends on LEDS_TRIGGERS && ADM5120
+ help
+ This allows LEDs to be controlled by the port states of
+ the ADM5120 built-in Ethernet Switch
+ If unsure, say N.
+
endif # NEW_LEDS
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -42,3 +42,4 @@ obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledt
obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o
obj-$(CONFIG_LEDS_TRIGGER_MORSE) += ledtrig-morse.o
obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o
+obj-$(CONFIG_LEDS_TRIGGER_ADM5120_SWITCH) += ledtrig-adm5120-switch.o

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@ -0,0 +1,84 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -53,6 +53,12 @@
#define AT49BV6416 0x00d6
#define MANUFACTURER_SAMSUNG 0x00ec
+/* Macronix */
+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */
+#define MX29LV160T 0x22C4 /* MX29LV160 Top-boot chip */
+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */
+#define MX29LV320T 0x22A7 /* MX29LV320 Top-boot chip */
+
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
@@ -283,6 +289,41 @@ static void fixup_s29gl032n_sectors(stru
}
}
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+/*
+ * Some Macronix chips has no/bad bootblock information in the CFI table
+ */
+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param)
+{
+ struct map_info *map = mtd->priv;
+ struct cfi_private *cfi = map->fldrv_priv;
+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv;
+ __u8 t;
+
+ switch (cfi->id) {
+ /* TODO: put affected chip ids here */
+ case MX29LV160B:
+ case MX29LV320B:
+ t = 2; /* Bottom boot */
+ break;
+ case MX29LV160T:
+ case MX29LV320T:
+ t = 3; /* Top boot */
+ break;
+ default:
+ return;
+ }
+
+ if (extp->TopBottom == t)
+ /* boot location detected by the CFI layer is correct */
+ return;
+
+ extp->TopBottom = t;
+ printk("%s: Macronix chip detected, id:0x%04X, boot location forced "
+ "to %s\n", map->name, cfi->id, (t == 2) ? "bottom" : "top");
+}
+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */
+
static struct cfi_fixup cfi_fixup_table[] = {
{ CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL },
#ifdef AMD_BOOTLOC_BUG
@@ -319,6 +360,9 @@ static struct cfi_fixup fixup_table[] =
*/
{ CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL },
{ CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL },
+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, },
+#endif
{ 0, 0, NULL, NULL }
};
--- a/drivers/mtd/chips/Kconfig
+++ b/drivers/mtd/chips/Kconfig
@@ -198,6 +198,14 @@ config MTD_CFI_AMDSTD
provides support for one of those command sets, used on chips
including the AMD Am29LV320.
+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC
+ bool "Fix boot-block location for Macronix flash chips"
+ depends on MTD_CFI_AMDSTD
+ help
+ Some Macronix flash chips have no/wrong boot-block location in the
+ CFI table, and the driver may detect the type incorrectly. Select
+ this if your board has such chip.
+
config MTD_CFI_STAA
tristate "Support for ST (Advanced Architecture) flash chips"
depends on MTD_GEN_PROBE

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@ -0,0 +1,68 @@
--- a/drivers/mtd/chips/jedec_probe.c
+++ b/drivers/mtd/chips/jedec_probe.c
@@ -133,6 +133,10 @@
#define UPD29F064115 0x221C
/* PMC */
+#define PM39LV512 0x001B
+#define PM39LV010 0x001C
+#define PM39LV020 0x003D
+#define PM39LV040 0x003E
#define PM49FL002 0x006D
#define PM49FL004 0x006E
#define PM49FL008 0x006A
@@ -1275,6 +1279,54 @@ static const struct amd_flash_info jedec
ERASEINFO(0x02000,2),
ERASEINFO(0x04000,1),
}
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV512,
+ .name = "PMC Pm39LV512",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_64KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,16),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV010,
+ .name = "PMC Pm39LV010",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_128KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,32),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV020,
+ .name = "PMC Pm39LV020",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_256KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,64),
+ }
+ }, {
+ .mfr_id = MANUFACTURER_PMC,
+ .dev_id = PM39LV040,
+ .name = "PMC Pm39LV040",
+ .devtypes = CFI_DEVICETYPE_X8,
+ .uaddr = MTD_UADDR_0x0555_0x02AA,
+ .dev_size = SIZE_512KiB,
+ .cmd_set = P_ID_AMD_STD,
+ .nr_regions = 1,
+ .regions = {
+ ERASEINFO(0x01000,128),
+ }
}, {
.mfr_id = MANUFACTURER_PMC,
.dev_id = PM49FL002,

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@ -0,0 +1,24 @@
--- a/drivers/mtd/Kconfig
+++ b/drivers/mtd/Kconfig
@@ -63,6 +63,11 @@ config MTD_ROOTFS_SPLIT
depends on MTD_PARTITIONS
default y
+config MTD_TRXSPLIT
+ bool "Automatically find and split TRX partitions"
+ depends on MTD_PARTITIONS
+ default n
+
config MTD_REDBOOT_PARTS
tristate "RedBoot partition table parsing"
depends on MTD_PARTITIONS
--- a/drivers/mtd/Makefile
+++ b/drivers/mtd/Makefile
@@ -8,6 +8,7 @@ mtd-y := mtdcore.o mtdsuper.o mtdbdi.
mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o
obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o
+obj-$(CONFIG_MTD_TRXSPLIT) += trxsplit.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o
obj-$(CONFIG_MTD_AFS_PARTS) += afs.o

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@ -0,0 +1,28 @@
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -77,6 +77,7 @@ obj-$(CONFIG_PATA_PLATFORM) += pata_plat
obj-$(CONFIG_PATA_AT91) += pata_at91.o
obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o
obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o
+obj-$(CONFIG_PATA_RB153_CF) += pata_rb153_cf.o
# Should be last but two libata driver
obj-$(CONFIG_PATA_ACPI) += pata_acpi.o
# Should be last but one libata driver
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -597,6 +597,15 @@ config PATA_RADISYS
If unsure, say N.
+config PATA_RB153_CF
+ tristate "RouterBOARD 153 Compact Flash support"
+ depends on ADM5120_MACH_RB_153
+ help
+ This option enables support for a Compact Flash connected on
+ the RouterBOARD 153.
+
+ If unsure, say N.
+
config PATA_RB532
tristate "RouterBoard 532 PATA CompactFlash support"
depends on MIKROTIK_RB532

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@ -0,0 +1,378 @@
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -50,11 +50,10 @@
#include <asm/io.h>
-#define UART_NR 8
-
#define SERIAL_AMBA_MAJOR 204
#define SERIAL_AMBA_MINOR 16
-#define SERIAL_AMBA_NR UART_NR
+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS
+#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME
#define AMBA_ISR_PASS_LIMIT 256
@@ -80,9 +79,9 @@ static void pl010_stop_tx(struct uart_po
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr &= ~UART010_CR_TIE;
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_start_tx(struct uart_port *port)
@@ -90,9 +89,9 @@ static void pl010_start_tx(struct uart_p
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr |= UART010_CR_TIE;
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_stop_rx(struct uart_port *port)
@@ -100,9 +99,9 @@ static void pl010_stop_rx(struct uart_po
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_enable_ms(struct uart_port *port)
@@ -110,9 +109,9 @@ static void pl010_enable_ms(struct uart_
struct uart_amba_port *uap = (struct uart_amba_port *)port;
unsigned int cr;
- cr = readb(uap->port.membase + UART010_CR);
+ cr = __raw_readl(uap->port.membase + UART010_CR);
cr |= UART010_CR_MSIE;
- writel(cr, uap->port.membase + UART010_CR);
+ __raw_writel(cr, uap->port.membase + UART010_CR);
}
static void pl010_rx_chars(struct uart_amba_port *uap)
@@ -120,9 +119,9 @@ static void pl010_rx_chars(struct uart_a
struct tty_struct *tty = uap->port.state->port.tty;
unsigned int status, ch, flag, rsr, max_count = 256;
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
while (UART_RX_DATA(status) && max_count--) {
- ch = readb(uap->port.membase + UART01x_DR);
+ ch = __raw_readl(uap->port.membase + UART01x_DR);
flag = TTY_NORMAL;
uap->port.icount.rx++;
@@ -131,9 +130,9 @@ static void pl010_rx_chars(struct uart_a
* Note that the error handling code is
* out of the main execution path
*/
- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX;
if (unlikely(rsr & UART01x_RSR_ANY)) {
- writel(0, uap->port.membase + UART01x_ECR);
+ __raw_writel(0, uap->port.membase + UART01x_ECR);
if (rsr & UART01x_RSR_BE) {
rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
@@ -163,7 +162,7 @@ static void pl010_rx_chars(struct uart_a
uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag);
ignore_char:
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
}
spin_unlock(&uap->port.lock);
tty_flip_buffer_push(tty);
@@ -176,7 +175,7 @@ static void pl010_tx_chars(struct uart_a
int count;
if (uap->port.x_char) {
- writel(uap->port.x_char, uap->port.membase + UART01x_DR);
+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR);
uap->port.icount.tx++;
uap->port.x_char = 0;
return;
@@ -188,7 +187,7 @@ static void pl010_tx_chars(struct uart_a
count = uap->port.fifosize >> 1;
do {
- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
uap->port.icount.tx++;
if (uart_circ_empty(xmit))
@@ -206,9 +205,9 @@ static void pl010_modem_status(struct ua
{
unsigned int status, delta;
- writel(0, uap->port.membase + UART010_ICR);
+ __raw_writel(0, uap->port.membase + UART010_ICR);
- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
delta = status ^ uap->old_status;
uap->old_status = status;
@@ -236,7 +235,7 @@ static irqreturn_t pl010_int(int irq, vo
spin_lock(&uap->port.lock);
- status = readb(uap->port.membase + UART010_IIR);
+ status = __raw_readl(uap->port.membase + UART010_IIR);
if (status) {
do {
if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
@@ -249,7 +248,7 @@ static irqreturn_t pl010_int(int irq, vo
if (pass_counter-- == 0)
break;
- status = readb(uap->port.membase + UART010_IIR);
+ status = __raw_readl(uap->port.membase + UART010_IIR);
} while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
UART010_IIR_TIS));
handled = 1;
@@ -263,7 +262,7 @@ static irqreturn_t pl010_int(int irq, vo
static unsigned int pl010_tx_empty(struct uart_port *port)
{
struct uart_amba_port *uap = (struct uart_amba_port *)port;
- unsigned int status = readb(uap->port.membase + UART01x_FR);
+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR);
return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
}
@@ -273,7 +272,7 @@ static unsigned int pl010_get_mctrl(stru
unsigned int result = 0;
unsigned int status;
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
if (status & UART01x_FR_DCD)
result |= TIOCM_CAR;
if (status & UART01x_FR_DSR)
@@ -299,12 +298,12 @@ static void pl010_break_ctl(struct uart_
unsigned int lcr_h;
spin_lock_irqsave(&uap->port.lock, flags);
- lcr_h = readb(uap->port.membase + UART010_LCRH);
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
if (break_state == -1)
lcr_h |= UART01x_LCRH_BRK;
else
lcr_h &= ~UART01x_LCRH_BRK;
- writel(lcr_h, uap->port.membase + UART010_LCRH);
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
spin_unlock_irqrestore(&uap->port.lock, flags);
}
@@ -332,12 +331,12 @@ static int pl010_startup(struct uart_por
/*
* initialise the old status of the modem signals
*/
- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY;
/*
* Finally, enable interrupts
*/
- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE,
uap->port.membase + UART010_CR);
return 0;
@@ -360,10 +359,10 @@ static void pl010_shutdown(struct uart_p
/*
* disable all interrupts, disable the port
*/
- writel(0, uap->port.membase + UART010_CR);
+ __raw_writel(0, uap->port.membase + UART010_CR);
/* disable break condition and fifos */
- writel(readb(uap->port.membase + UART010_LCRH) &
+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) &
~(UART01x_LCRH_BRK | UART01x_LCRH_FEN),
uap->port.membase + UART010_LCRH);
@@ -385,7 +384,7 @@ pl010_set_termios(struct uart_port *port
/*
* Ask the core to calculate the divisor for us.
*/
- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16);
quot = uart_get_divisor(port, baud);
switch (termios->c_cflag & CSIZE) {
@@ -448,25 +447,25 @@ pl010_set_termios(struct uart_port *port
uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX;
/* first, disable everything */
- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE;
if (UART_ENABLE_MS(port, termios->c_cflag))
old_cr |= UART010_CR_MSIE;
- writel(0, uap->port.membase + UART010_CR);
+ __raw_writel(0, uap->port.membase + UART010_CR);
/* Set baud rate */
quot -= 1;
- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
- writel(quot & 0xff, uap->port.membase + UART010_LCRL);
+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM);
+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL);
/*
* ----------v----------v----------v----------v-----
* NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
* ----------^----------^----------^----------^-----
*/
- writel(lcr_h, uap->port.membase + UART010_LCRH);
- writel(old_cr, uap->port.membase + UART010_CR);
+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH);
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
spin_unlock_irqrestore(&uap->port.lock, flags);
}
@@ -538,7 +537,7 @@ static struct uart_ops amba_pl010_pops =
.verify_port = pl010_verify_port,
};
-static struct uart_amba_port *amba_ports[UART_NR];
+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR];
#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
@@ -548,10 +547,10 @@ static void pl010_console_putchar(struct
unsigned int status;
do {
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
barrier();
} while (!UART_TX_READY(status));
- writel(ch, uap->port.membase + UART01x_DR);
+ __raw_writel(ch, uap->port.membase + UART01x_DR);
}
static void
@@ -565,8 +564,8 @@ pl010_console_write(struct console *co,
/*
* First save the CR then disable the interrupts
*/
- old_cr = readb(uap->port.membase + UART010_CR);
- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
+ old_cr = __raw_readl(uap->port.membase + UART010_CR);
+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR);
uart_console_write(&uap->port, s, count, pl010_console_putchar);
@@ -575,10 +574,10 @@ pl010_console_write(struct console *co,
* and restore the TCR
*/
do {
- status = readb(uap->port.membase + UART01x_FR);
+ status = __raw_readl(uap->port.membase + UART01x_FR);
barrier();
} while (status & UART01x_FR_BUSY);
- writel(old_cr, uap->port.membase + UART010_CR);
+ __raw_writel(old_cr, uap->port.membase + UART010_CR);
clk_disable(uap->clk);
}
@@ -587,9 +586,9 @@ static void __init
pl010_console_get_options(struct uart_amba_port *uap, int *baud,
int *parity, int *bits)
{
- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) {
unsigned int lcr_h, quot;
- lcr_h = readb(uap->port.membase + UART010_LCRH);
+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH);
*parity = 'n';
if (lcr_h & UART01x_LCRH_PEN) {
@@ -604,8 +603,8 @@ pl010_console_get_options(struct uart_am
else
*bits = 8;
- quot = readb(uap->port.membase + UART010_LCRL) |
- readb(uap->port.membase + UART010_LCRM) << 8;
+ quot = __raw_readl(uap->port.membase + UART010_LCRL) |
+ __raw_readl(uap->port.membase + UART010_LCRM) << 8;
*baud = uap->port.uartclk / (16 * (quot + 1));
}
}
@@ -623,7 +622,7 @@ static int __init pl010_console_setup(st
* if so, search for the first available port that does have
* console support.
*/
- if (co->index >= UART_NR)
+ if (co->index >= SERIAL_AMBA_NR)
co->index = 0;
uap = amba_ports[co->index];
if (!uap)
@@ -641,7 +640,7 @@ static int __init pl010_console_setup(st
static struct uart_driver amba_reg;
static struct console amba_console = {
- .name = "ttyAM",
+ .name = SERIAL_AMBA_NAME,
.write = pl010_console_write,
.device = uart_console_device,
.setup = pl010_console_setup,
@@ -657,11 +656,11 @@ static struct console amba_console = {
static struct uart_driver amba_reg = {
.owner = THIS_MODULE,
- .driver_name = "ttyAM",
- .dev_name = "ttyAM",
+ .driver_name = SERIAL_AMBA_NAME,
+ .dev_name = SERIAL_AMBA_NAME,
.major = SERIAL_AMBA_MAJOR,
.minor = SERIAL_AMBA_MINOR,
- .nr = UART_NR,
+ .nr = SERIAL_AMBA_NR,
.cons = AMBA_CONSOLE,
};
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -284,10 +284,25 @@ config SERIAL_AMBA_PL010
help
This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
an Integrator/AP or Integrator/PP2 platform, or if you have a
- Cirrus Logic EP93xx CPU, say Y or M here.
+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here.
If unsure, say N.
+config SERIAL_AMBA_PL010_NUMPORTS
+ int "Maximum number of AMBA PL010 serial ports"
+ depends on SERIAL_AMBA_PL010
+ default "8"
+ ---help---
+ Set this to the number of serial ports you want the AMBA PL010 driver
+ to support.
+
+config SERIAL_AMBA_PL010_PORTNAME
+ string "Name of the AMBA PL010 serial ports"
+ depends on SERIAL_AMBA_PL010
+ default "ttyAM"
+ ---help---
+ ::: To be written :::
+
config SERIAL_AMBA_PL010_CONSOLE
bool "Support for console on AMBA serial port"
depends on SERIAL_AMBA_PL010=y

View File

@ -0,0 +1,13 @@
--- a/drivers/amba/bus.c
+++ b/drivers/amba/bus.c
@@ -18,6 +18,10 @@
#include <asm/irq.h>
#include <asm/sizes.h>
+#ifndef NO_IRQ
+#define NO_IRQ (-1)
+#endif
+
#define to_amba_device(d) container_of(d, struct amba_device, dev)
#define to_amba_driver(d) container_of(d, struct amba_driver, drv)

View File

@ -0,0 +1,27 @@
--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
@@ -44,13 +44,17 @@ static void gpio_led_set(struct led_clas
container_of(led_cdev, struct gpio_led_data, cdev);
int level;
- if (value == LED_OFF)
- level = 0;
- else
- level = 1;
-
- if (led_dat->active_low)
- level = !level;
+ switch (value) {
+ case LED_OFF:
+ level = led_dat->active_low ? 1 : 0;
+ break;
+ case LED_FULL:
+ level = led_dat->active_low ? 0 : 1;
+ break;
+ default:
+ level = value;
+ break;
+ }
/* Setting GPIOs with I2C/etc requires a task context, and we don't
* seem to have a reliable way to know if we're already in one; so

View File

@ -0,0 +1,31 @@
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -790,6 +790,18 @@ config RC32434_WDT
To compile this driver as a module, choose M here: the
module will be called rc32434_wdt.
+config ADM5120_WDT
+ tristate "Infineon ADM5120 SoC hardware watchdog"
+ depends on WATCHDOG && ADM5120
+ help
+ This is a driver for hardware watchdog integrated in Infineon
+ ADM5120 SoC. This watchdog simply watches your kernel to make sure
+ it doesn't freeze, and if it does, it reboots your computer after a
+ certain amount of time.
+
+ To compile this driver as a module, choose M here: the module will be
+ called adm5120_wdt.
+
config INDYDOG
tristate "Indy/I2 Hardware Watchdog"
depends on SGI_HAS_INDYDOG
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -113,6 +113,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
+obj-$(CONFIG_ADM5120_WDT) += adm5120_wdt.o
# PARISC Architecture

View File

@ -0,0 +1,209 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_P_334WT=y
CONFIG_ADM5120_MACH_P_335=y
# CONFIG_ADM5120_OEM_CELLVISION is not set
# CONFIG_ADM5120_OEM_COMPEX is not set
# CONFIG_ADM5120_OEM_EDIMAX is not set
# CONFIG_ADM5120_OEM_INFINEON is not set
# CONFIG_ADM5120_OEM_MIKROTIK is not set
# CONFIG_ADM5120_OEM_MOTOROLA is not set
CONFIG_ADM5120_OEM_OSBRIDGE=y
CONFIG_ADM5120_OEM_ZYXEL=y
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
CONFIG_BINFMT_MISC=m
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2"
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
# CONFIG_CPU_LITTLE_ENDIAN is not set
# CONFIG_CPU_LOONGSON2E is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
# CONFIG_GPIO_PL061 is not set
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
# CONFIG_INPUT_GPIO_BUTTONS is not set
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_BLOCK2MTD=y
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_TRXSPLIT=y
# CONFIG_NET_PCI is not set
CONFIG_NLS=m
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SOFT_WATCHDOG=m
CONFIG_SWAP_IO_SPACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRAD_SIGNALS=y
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_DEBUG=y
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_ZONE_DMA_FLAG=0

View File

@ -0,0 +1,265 @@
CONFIG_32BIT=y
# CONFIG_64BIT is not set
CONFIG_ADM5120=y
CONFIG_ADM5120_ENET=y
CONFIG_ADM5120_MACH_5GXI=y
CONFIG_ADM5120_MACH_BR_6104K=y
CONFIG_ADM5120_MACH_BR_6104KP=y
CONFIG_ADM5120_MACH_BR_61X4WG=y
CONFIG_ADM5120_MACH_CAS_771=y
CONFIG_ADM5120_MACH_EASY5120P_ATA=y
CONFIG_ADM5120_MACH_EASY5120_RT=y
CONFIG_ADM5120_MACH_EASY5120_WVOIP=y
CONFIG_ADM5120_MACH_EASY83000=y
CONFIG_ADM5120_MACH_NFS_101=y
CONFIG_ADM5120_MACH_NP27G=y
CONFIG_ADM5120_MACH_NP28G=y
CONFIG_ADM5120_MACH_PMUGW=y
CONFIG_ADM5120_MACH_RB_11X=y
CONFIG_ADM5120_MACH_RB_133=y
CONFIG_ADM5120_MACH_RB_133C=y
CONFIG_ADM5120_MACH_RB_150=y
CONFIG_ADM5120_MACH_RB_153=y
CONFIG_ADM5120_MACH_RB_192=y
CONFIG_ADM5120_MACH_WP54=y
CONFIG_ADM5120_OEM_CELLVISION=y
CONFIG_ADM5120_OEM_COMPEX=y
CONFIG_ADM5120_OEM_EDIMAX=y
CONFIG_ADM5120_OEM_INFINEON=y
CONFIG_ADM5120_OEM_MIKROTIK=y
CONFIG_ADM5120_OEM_MOTOROLA=y
CONFIG_ADM5120_OEM_OSBRIDGE=y
# CONFIG_ADM5120_OEM_ZYXEL is not set
CONFIG_ADM5120_SOC_BGA=y
CONFIG_ADM5120_WDT=y
# CONFIG_ALCHEMY_GPIO_INDIRECT is not set
# CONFIG_AR7 is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_POPULATES_NODE_MAP=y
CONFIG_ARCH_REQUIRE_GPIOLIB=y
# CONFIG_ARCH_SUPPORTS_MSI is not set
CONFIG_ARCH_SUPPORTS_OPROFILE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM_AMBA=y
CONFIG_ATA=m
# CONFIG_ATA_PIIX is not set
# CONFIG_BCM47XX is not set
# CONFIG_BCM63XX is not set
CONFIG_BITREVERSE=y
# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set
# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CEVT_R4K=y
CONFIG_CEVT_R4K_LIB=y
CONFIG_CFG80211_DEFAULT_PS_VALUE=0
CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,yaffs2,jffs2"
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_CAVIUM_OCTEON is not set
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_LOONGSON2E is not set
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R5500 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_AES=m
CONFIG_CRYPTO_ARC4=m
CONFIG_CRYPTO_BLKCIPHER=m
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_ECB=m
CONFIG_CRYPTO_HASH=m
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_MANAGER=m
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MICHAEL_MIC=m
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_CSRC_R4K_LIB=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ELF_CORE=y
CONFIG_FIRMWARE_IN_KERNEL=y
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_ACL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
# CONFIG_GPIO_PL061 is not set
CONFIG_GPIO_SYSFS=y
# CONFIG_HAMRADIO is not set
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HID=m
CONFIG_HID_SUPPORT=y
CONFIG_HOSTAP=m
CONFIG_HOSTAP_FIRMWARE=y
# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set
CONFIG_HOSTAP_PCI=m
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INOTIFY=y
CONFIG_INOTIFY_USER=y
CONFIG_INPUT=m
# CONFIG_INPUT_GPIO_BUTTONS is not set
# CONFIG_INPUT_YEALINK is not set
CONFIG_IRQ_CPU=y
# CONFIG_ISDN is not set
CONFIG_KEXEC=y
CONFIG_LEDS_GPIO=m
CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LIB80211=m
CONFIG_LIB80211_CRYPT_CCMP=m
CONFIG_LIB80211_CRYPT_TKIP=m
CONFIG_LIB80211_CRYPT_WEP=m
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_LOONGSON is not set
# CONFIG_MACH_TX39XX is not set
# CONFIG_MACH_TX49XX is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MII=m
# CONFIG_MIKROTIK_RB532 is not set
CONFIG_MIPS=y
# CONFIG_MIPS_COBALT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_ADM5120=y
CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_PLATFORM=y
CONFIG_MTD_TRXSPLIT=y
CONFIG_NLS=m
CONFIG_NO_HZ=y
# CONFIG_NO_IOPORT is not set
# CONFIG_NXP_STB220 is not set
# CONFIG_NXP_STB225 is not set
CONFIG_PAGEFLAGS_EXTENDED=y
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_PATA_RB153_CF=m
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_SCHED_OMIT_FRAME_POINTER=y
CONFIG_SCSI=m
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL010=y
CONFIG_SERIAL_AMBA_PL010_CONSOLE=y
CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2
CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS"
# CONFIG_SERIAL_AMBA_PL011 is not set
CONFIG_SERIO=y
# CONFIG_SERIO_AMBAKMI is not set
# CONFIG_SERIO_I8042 is not set
# CONFIG_SERIO_LIBPS2 is not set
# CONFIG_SERIO_PCIPS2 is not set
# CONFIG_SERIO_RAW is not set
CONFIG_SERIO_SERPORT=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP28 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SLAB is not set
CONFIG_SLUB=y
CONFIG_SOFT_WATCHDOG=m
# CONFIG_SWAP is not set
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TRAD_SIGNALS=y
# CONFIG_TREE_PREEMPT_RCU is not set
CONFIG_TREE_RCU=y
CONFIG_USB=m
CONFIG_USB_ADM5120_HCD=m
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m
CONFIG_USB_SUPPORT=y
# CONFIG_USB_UHCI_HCD is not set
CONFIG_VLAN_8021Q=m
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_YAFFS_9BYTE_TAGS=y
# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set
CONFIG_YAFFS_AUTO_YAFFS2=y
# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set
# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set
CONFIG_YAFFS_FS=y
CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y
CONFIG_YAFFS_YAFFS1=y
CONFIG_YAFFS_YAFFS2=y
CONFIG_ZONE_DMA_FLAG=0