bcm4908: add bcm_sf2 fixes for the 5th GPHY

This allows using the last integrated PHY (and so e.g. WAN port on the
ASUS GT-AC5300).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This commit is contained in:
Rafał Miłecki 2021-02-16 00:21:28 +01:00
parent a015d91708
commit ad8b759fd1
2 changed files with 76 additions and 0 deletions

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@ -0,0 +1,46 @@
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 15 Feb 2021 23:59:26 +0100
Subject: [PATCH] net: dsa: bcm_sf2: enable GPHY for switch probing
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
GPHY needs to be enabled to succesfully probe & setup switch port
connected to it. Otherwise hardcoding PHY OUI would be required.
Before:
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch wan (uninitialized): error -5 setting up PHY for tree 0, switch 0, port 7
After:
brcm-sf2 80080000.switch lan4 (uninitialized): PHY [800c05c0.mdio--1:08] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan3 (uninitialized): PHY [800c05c0.mdio--1:09] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan2 (uninitialized): PHY [800c05c0.mdio--1:0a] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch lan1 (uninitialized): PHY [800c05c0.mdio--1:0b] driver [Generic PHY] (irq=POLL)
brcm-sf2 80080000.switch wan (uninitialized): PHY [800c05c0.mdio--1:0c] driver [Generic PHY] (irq=POLL)
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1234,10 +1234,14 @@ static int bcm_sf2_sw_probe(struct platf
rev = reg_readl(priv, REG_PHY_REVISION);
priv->hw_params.gphy_rev = rev & PHY_REVISION_MASK;
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
ret = b53_switch_register(dev);
if (ret)
goto out_mdio;
+ bcm_sf2_gphy_enable_set(priv->dev->ds, false);
+
dev_info(&pdev->dev,
"Starfighter 2 top: %x.%02x, core: %x.%02x, IRQs: %d, %d\n",
priv->hw_params.top_rev >> 8, priv->hw_params.top_rev & 0xff,

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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 16 Feb 2021 00:06:35 +0100
Subject: [PATCH] net: dsa: bcm_sf2: keep GPHY enabled on the BCM4908
Trying to access disabled PHY results in MDIO_READ_FAIL and:
[ 11.962886] brcm-sf2 80080000.switch wan: configuring for phy/internal link mode
[ 11.972500] 8021q: adding VLAN 0 to HW filter on device wan
[ 11.980205] ------------[ cut here ]------------
[ 11.984885] WARNING: CPU: 0 PID: 7 at phy_error+0x10/0x58
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
drivers/net/dsa/bcm_sf2.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/drivers/net/dsa/bcm_sf2.c
+++ b/drivers/net/dsa/bcm_sf2.c
@@ -1248,6 +1248,12 @@ static int bcm_sf2_sw_probe(struct platf
priv->hw_params.core_rev >> 8, priv->hw_params.core_rev & 0xff,
priv->irq0, priv->irq1);
+ /* BCM4908 has 5 GPHYs which means bcm_sf2_port_setup() will not enable
+ * GPHY when needed. Leave it enabled here.
+ */
+ if (priv->type == BCM4908_DEVICE_ID)
+ bcm_sf2_gphy_enable_set(priv->dev->ds, true);
+
return 0;
out_mdio: