ramips: create shared DTSI for MT7620 Phicomm K2x series devices

Improve compatibility of the device tree include file. Now a new .dtsi
file will support both PSG1218A, PSG1218B and K2G.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
[improve commit title, rebase]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This commit is contained in:
Shiji Yang 2021-03-21 16:45:24 +08:00 committed by Adrian Schmutzler
parent c36e47c5da
commit df6154848a
4 changed files with 31 additions and 115 deletions

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@ -1,100 +1,21 @@
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7620a_phicomm_k2x.dtsi"
/ {
compatible = "phicomm,k2g", "ralink,mt7620a-soc";
model = "Phicomm K2G";
aliases {
led-boot = &led_blue;
led-failsafe = &led_blue;
led-running = &led_blue;
led-upgrade = &led_blue;
};
leds {
compatible = "gpio-leds";
led_blue: blue {
label = "blue:status";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
yellow {
label = "yellow:status";
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
};
red {
label = "red:status";
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <80000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x30000>;
label = "u-boot";
read-only;
};
partition@30000 {
reg = <0x30000 0x10000>;
label = "u-boot-env";
read-only;
};
factory: partition@40000 {
reg = <0x40000 0x10000>;
label = "factory";
read-only;
};
partition@50000 {
reg = <0x50000 0x50000>;
label = "permanent_config";
read-only;
};
partition@a0000 {
compatible = "denx,uimage";
reg = <0xa0000 0x760000>;
label = "firmware";
};
};
&partitions {
partition@50000 {
reg = <0x50000 0x50000>;
label = "permanent_config";
read-only;
};
};
&state_default {
gpio {
groups = "i2c", "uartf";
function = "gpio";
partition@a0000 {
compatible = "denx,uimage";
reg = <0xa0000 0x760000>;
label = "firmware";
};
};
@ -122,20 +43,7 @@
};
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
pinctrl-names = "default";
pinctrl-0 = <&pa_pins>;
};

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@ -4,8 +4,6 @@
#include <dt-bindings/input/input.h>
/ {
compatible = "phicomm,psg1218", "ralink,mt7620a-soc";
aliases {
led-boot = &led_blue;
led-failsafe = &led_blue;
@ -53,7 +51,7 @@
spi-max-frequency = <80000000>;
m25p,fast-read;
partitions {
partitions: partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
@ -64,23 +62,17 @@
read-only;
};
partition@20000 {
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@30000 {
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@40000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};

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@ -1,10 +1,18 @@
#include "mt7620a_phicomm_psg1218.dtsi"
#include "mt7620a_phicomm_k2x.dtsi"
/ {
compatible = "phicomm,psg1218a", "phicomm,psg1218", "ralink,mt7620a-soc";
model = "Phicomm PSG1218 rev.A";
};
&partitions {
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
&ethernet {
mtd-mac-address = <&factory 0x28>;

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@ -1,10 +1,18 @@
#include "mt7620a_phicomm_psg1218.dtsi"
#include "mt7620a_phicomm_k2x.dtsi"
/ {
compatible = "phicomm,psg1218b", "phicomm,psg1218", "ralink,mt7620a-soc";
model = "Phicomm PSG1218 rev.B";
};
&partitions {
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
&ethernet {
mtd-mac-address = <&factory 0x28>;
};