bcm53xx: make the l2x0 L2 cache controller work

This fixes the DMA problems with the Ethernet driver.
This also updates some other parts of the patches.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 39203
This commit is contained in:
Hauke Mehrtens 2014-01-04 23:46:44 +00:00
parent 2bc9700c0d
commit e0027ed4ab
5 changed files with 94 additions and 80 deletions

View File

@ -1,6 +1,6 @@
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_ARCH_BCM is not set
CONFIG_ARCH_BCM53XX=y
CONFIG_ARCH_BCM_5301X=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
@ -48,7 +48,8 @@ CONFIG_BCMA_HOST_PCI=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
CONFIG_BCMA_HOST_SOC=y
CONFIG_BGMAC=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CACHE_L2X0=y
CONFIG_CACHE_PL310=y
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK=y
@ -71,7 +72,7 @@ CONFIG_CPU_RMAP=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BCM53XX=y
CONFIG_DEBUG_BCM_5301X=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_INCLUDE="debug/bcm53xx.S"
@ -165,11 +166,17 @@ CONFIG_OF_PCI=y
CONFIG_OF_PCI_IRQ=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OUTER_CACHE=y
CONFIG_OUTER_CACHE_SYNC=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PCI=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PHYLIB=y
# CONFIG_PL310_ERRATA_588369 is not set
# CONFIG_PL310_ERRATA_727915 is not set
# CONFIG_PL310_ERRATA_753970 is not set
# CONFIG_PL310_ERRATA_769419 is not set
# CONFIG_PREEMPT_RCU is not set
CONFIG_RCU_STALL_COMMON=y
CONFIG_RFS_ACCEL=y

View File

@ -14,7 +14,7 @@ define Image/Prepare
endef
define Image/Build/Initramfs
$(call Image/Build/Initramfs/Chk,bcm5301-netgear-r6250,U12H245T00_NETGEAR,2,initramfs)
$(call Image/Build/Initramfs/Chk,bcm4708-netgear-r6250,U12H245T00_NETGEAR,2,initramfs)
endef
define Image/Build/Initramfs/Chk
@ -49,7 +49,7 @@ endef
define Image/Build
$(call Image/Build/$(1),$(1))
$(call Image/Build/squashfs/Chk,bcm5301-netgear-r6250,U12H245T00_NETGEAR,2,squashfs)
$(call Image/Build/squashfs/Chk,bcm4708-netgear-r6250,U12H245T00_NETGEAR,2,squashfs)
endef

View File

@ -42,9 +42,9 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
bool "Kernel low-level debugging on BCM2835 PL011 UART"
depends on ARCH_BCM2835
+ config DEBUG_BCM53XX
+ config DEBUG_BCM_5301X
+ bool "Kernel low-level debugging on BCM53XX UART1"
+ depends on ARCH_BCM53XX
+ depends on ARCH_BCM_5301X
+
config DEBUG_CLPS711X_UART1
bool "Kernel low-level debugging messages via UART1"
@ -53,7 +53,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
config DEBUG_LL_INCLUDE
string
default "debug/bcm2835.S" if DEBUG_BCM2835
+ default "debug/bcm53xx.S" if DEBUG_BCM53XX
+ default "debug/bcm53xx.S" if DEBUG_BCM_5301X
default "debug/cns3xxx.S" if DEBUG_CNS3XXX
default "debug/exynos.S" if DEBUG_EXYNOS_UART
default "debug/highbank.S" if DEBUG_HIGHBANK_UART
@ -63,7 +63,7 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM) += bcm
machine-$(CONFIG_ARCH_BCM2835) += bcm2835
+machine-$(CONFIG_ARCH_BCM53XX) += bcm53xx
+machine-$(CONFIG_ARCH_BCM_5301X) += bcm53xx
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
machine-$(CONFIG_ARCH_DAVINCI) += davinci
@ -73,15 +73,15 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
wm8650-mid.dtb \
wm8850-w70v2.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
+dtb-$(CONFIG_ARCH_BCM53XX) += bcm5301-netgear-r6250.dtb
+dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
targets += dtbs
targets += $(dtb-y)
--- /dev/null
+++ b/arch/arm/boot/dts/bcm5301-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
@@ -0,0 +1,20 @@
+/*
+ * Broadcom BCM47XX / BCM53XX arm platform code.
+ * Broadcom BCM470X / BCM5301X arm platform code.
+ *
+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
+ *
@ -90,36 +90,39 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+
+/dts-v1/;
+
+/include/ "bcm5301.dtsi"
+#include "bcm4708.dtsi"
+
+/ {
+ compatible = "netgear,r6250v1", "broadcom,bcm4708";
+ model = "Netgear R6250 V1 (BCM4708)";
+ compatible = "netgear,r6250v1", "brcm,bcm5301";
+
+ memory {
+ reg = <0x00000000 0x08000000>;
+ };
+};
--- /dev/null
+++ b/arch/arm/boot/dts/bcm5301.dtsi
@@ -0,0 +1,83 @@
+++ b/arch/arm/boot/dts/bcm4708.dtsi
@@ -0,0 +1,100 @@
+/*
+ * Broadcom BCM47XX / BCM53XX ARM platform code.
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ *
+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
+ *
+ * Licensed under the GNU/GPL. See COPYING for details.
+ */
+
+/include/ "skeleton.dtsi"
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+#include "skeleton.dtsi"
+
+/ {
+ compatible = "brcm,bcm5301";
+ model = "BCM5301/BCM4707/BCM4708/BCM4709 SoC";
+ compatible = "broadcom,bcm4708";
+ model = "Broadcom BCM4708";
+ interrupt-parent = <&gic>;
+
+ chosen {
+ bootargs = "console=ttyS0,115200 earlyprintk debug vmalloc=64M";
+ bootargs = "console=ttyS0,115200 debug earlyprintk";
+ };
+
+ cpus {
@ -129,11 +132,13 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
+ reg = <0>;
+ };
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ next-level-cache = <&L2>;
+ reg = <1>;
+ };
+ };
@ -152,14 +157,14 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ uart@18000300 {
+ compatible = "ns16550";
+ reg = <0x18000300 0x100>;
+ interrupts = <0 85 4>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <100000000>;
+ };
+
+ uart@18000400 {
+ compatible = "ns16550";
+ reg = <0x18000400 0x100>;
+ interrupts = <0 85 4>;
+ interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <100000000>;
+ };
+
@ -175,15 +180,27 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ timer@19020200 {
+ compatible = "arm,cortex-a9-global-timer";
+ reg = <0x19020200 0x100>;
+ interrupts = <1 11 0xf04>;
+ interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_periph>;
+ #clock-cells = <0>;
+ };
+
+ local-timer@19020200 {
+ local-timer@19020600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x19020600 0x100>;
+ interrupts = <1 13 0xf04>;
+ interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_periph>;
+ };
+
+ L2: cache-controller@19022000 {
+ compatible = "arm,pl310-cache";
+ reg = <0x19022000 0x1000>;
+ cache-unified;
+ cache-level = <2>;
+ };
+
+ scu@19020000 {
+ compatible = "arm,cortex-a9-scu";
+ reg = <0x19020000 0x100>;
+ };
+};
--- /dev/null
@ -210,32 +227,42 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+#include <asm/hardware/debug-8250.S>
--- /dev/null
+++ b/arch/arm/mach-bcm53xx/Kconfig
@@ -0,0 +1,16 @@
+config ARCH_BCM53XX
+ bool "Broadcom BCM47XX / BCM53XX ARM SoC"
+ select CPU_V7
@@ -0,0 +1,26 @@
+config ARCH_BCM_5301X
+ bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
+ depends on MMU
+ select ARM_GIC
+ select CACHE_L2X0
+ select HAVE_ARM_SCU if SMP
+ select HAVE_ARM_TWD if LOCAL_TIMERS
+ select HAVE_ARM_TWD if SMP
+ select HAVE_SMP
+ select HAVE_CLK
+ select LOCAL_TIMERS if SMP
+ select GENERIC_TIME
+ select GENERIC_CLOCKEVENTS_BUILD
+ select COMMON_CLK
+ select GENERIC_CLOCKEVENTS
+ select GENERIC_TIME
+ select ARM_GLOBAL_TIMER
+ select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
+ select MIGHT_HAVE_PCI
+ help
+ Support for Broadcom BCM47XX and BCM53XX SoCs with ARM CPU cores.
+ Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
+
+ This is a network SoC line mostly used in home routers and
+ wifi access points.
+ This inclused the following SoC: BCM53010, BCM53011, BCM53012,
+ BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707,
+ BCM4708 and BCM4709.
+
+ Do not confuse this with the BCM4760 which is a totally
+ different SoC or with the older BCM47XX and BCM53XX based
+ network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
--- /dev/null
+++ b/arch/arm/mach-bcm53xx/Makefile
@@ -0,0 +1 @@
+obj-y += bcm53xx.o
--- /dev/null
+++ b/arch/arm/mach-bcm53xx/bcm53xx.c
@@ -0,0 +1,69 @@
@@ -0,0 +1,60 @@
+/*
+ * Broadcom BCM47XX / BCM53XX ARM platform code.
+ * Broadcom BCM470X / BCM5301X ARM platform code.
+ *
+ * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
+ *
@ -243,21 +270,19 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ */
+#include <linux/of_address.h>
+#include <linux/of_platform.h>
+#include <linux/irqchip.h>
+#include <linux/clocksource.h>
+#include <linux/clk-provider.h>
+#include <asm/hardware/cache-l2x0.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/smp_scu.h>
+#include <asm/signal.h>
+
+static int bcm53xx_abort_handler(unsigned long addr, unsigned int fsr,
+static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
+ struct pt_regs *regs)
+{
+ /*
+ * These happen for no good reason
+ * possibly left over from CFE
+ * These happen for no good reason, possibly left over from CFE
+ */
+ pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
+ addr, fsr);
@ -266,40 +291,33 @@ Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
+ return 0;
+}
+
+static void bcm53xx_aborts_enable(void)
+static void __init bcm5301x_init_early(void)
+{
+ /* Install our hook */
+ hook_fault_code(16 + 6, bcm53xx_abort_handler, SIGBUS, 0,
+ hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, 0,
+ "imprecise external abort");
+}
+
+static void __init bcm53xx_timer_init(void)
+static void __init bcm5301x_timer_init(void)
+{
+ of_clk_init(NULL);
+ clocksource_of_init();
+}
+
+void __init bcm53xx_map_io(void)
+{
+ debug_ll_io_init();
+ bcm53xx_aborts_enable();
+}
+
+static void __init bcm53xx_dt_init(void)
+static void __init bcm5301x_dt_init(void)
+{
+ l2x0_of_init(0, ~0UL);
+ of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+}
+
+static const char const *bcm53xx_dt_compat[] = {
+ "brcm,bcm5301",
+ "netgear,r6250v1",
+static const char __initconst *bcm5301x_dt_compat[] = {
+ "broadcom,bcm4708",
+ NULL,
+};
+
+DT_MACHINE_START(BCM53XX, "BCM53XX")
+ .init_machine = bcm53xx_dt_init,
+ .map_io = bcm53xx_map_io,
+ .init_irq = irqchip_init,
+ .init_time = bcm53xx_timer_init,
+ .dt_compat = bcm53xx_dt_compat,
+DT_MACHINE_START(BCM5301X, "BCM5301X")
+ .init_early = bcm5301x_init_early,
+ .init_time = bcm5301x_timer_init,
+ .init_machine = bcm5301x_dt_init,
+ .dt_compat = bcm5301x_dt_compat,
+MACHINE_END

View File

@ -2,12 +2,12 @@ bcm53xx: register bcma bus
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/arm/boot/dts/bcm5301.dtsi | 5 +++++
arch/arm/boot/dts/bcm4708.dtsi | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm/boot/dts/bcm5301.dtsi
+++ b/arch/arm/boot/dts/bcm5301.dtsi
@@ -67,6 +67,11 @@
--- a/arch/arm/boot/dts/bcm4708.dtsi
+++ b/arch/arm/boot/dts/bcm4708.dtsi
@@ -72,6 +72,11 @@
<0x19020100 0x100>;
};

View File

@ -31,18 +31,7 @@ The PHY says it is not connected by default, just ignore it.
static const struct bcma_device_id bgmac_bcma_tbl[] = {
BCMA_CORE(BCMA_MANUF_BCM, BCMA_CORE_4706_MAC_GBIT, BCMA_ANY_REV, BCMA_ANY_CLASS),
@@ -165,6 +169,10 @@ static netdev_tx_t bgmac_dma_tx_add(stru
netdev_sent_queue(net_dev, skb->len);
+ if (bgmac->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4707 ||
+ bgmac->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM53018)
+ mdelay(1);
+
wmb();
/* Increase ring->end to point empty slot. We tell hardware the first
@@ -1438,7 +1446,7 @@ static int bgmac_probe(struct bcma_devic
@@ -1438,7 +1442,7 @@ static int bgmac_probe(struct bcma_devic
int err;
/* We don't support 2nd, 3rd, ... units, SPROM has to be adjusted */
@ -51,7 +40,7 @@ The PHY says it is not connected by default, just ignore it.
pr_err("Unsupported core_unit %d\n", core->core_unit);
return -ENOTSUPP;
}
@@ -1534,8 +1542,7 @@ static int bgmac_probe(struct bcma_devic
@@ -1534,8 +1538,7 @@ static int bgmac_probe(struct bcma_devic
/* TODO: reset the external phy. Specs are needed */
bgmac_phy_reset(bgmac);