realtek: Add support for RTL9300/RTL9310 I2C multiplexing

The RTL9300/RTL9310 I2C controllers have support for 2 independent I2C
masters, each with a fixed SCL pin, that cannot be changed. Each of these
masters can use 8 (RTL9300) or 16 (RTL9310) different pins for SDA.
This multiplexer directly controls the two masters and their shared
IO configuration registers to allow multiplexing between any of these
busses. The two masters cannot be used in parallel as the multiplex
is protected by a standard multiplex lock.

Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This commit is contained in:
Birger Koblitz 2021-12-11 20:25:37 +01:00 committed by Daniel Golle
parent 63a0a4d85b
commit f4bdb7fdcc
4 changed files with 359 additions and 37 deletions

View File

@ -84,6 +84,8 @@ CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_GPIO=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_RTL9300=y
CONFIG_I2C_RTL9300=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y

View File

@ -4,9 +4,9 @@
#include <linux/of_platform.h>
#include "i2c-rtl9300.h"
#define REG(x) (i2c->base + x + (i2c->scl_num ? i2c->mst2_offset : 0))
#define REG_MASK(clear, set, reg) \
writel((readl(REG(reg)) & ~(clear)) | (set), REG(reg))
#define REG(i, x) (i->base + x + (i->scl_num ? i->mst2_offset : 0))
#define REG_MASK(i, clear, set, reg) \
writel((readl(REG(i, reg)) & ~(clear)) | (set), REG(i, reg))
struct i2c_drv_data {
int scl0_pin;
@ -29,22 +29,22 @@ DEFINE_MUTEX(i2c_lock);
static void rtl9300_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len)
{
// Set register address width
REG_MASK(0x3 << RTL9300_I2C_CTRL2_MADDR_WIDTH, len << RTL9300_I2C_CTRL2_MADDR_WIDTH,
REG_MASK(i2c, 0x3 << RTL9300_I2C_CTRL2_MADDR_WIDTH, len << RTL9300_I2C_CTRL2_MADDR_WIDTH,
RTL9300_I2C_CTRL2);
// Set register address
REG_MASK(0xffffff << RTL9300_I2C_CTRL1_MEM_ADDR, reg << RTL9300_I2C_CTRL1_MEM_ADDR,
REG_MASK(i2c, 0xffffff << RTL9300_I2C_CTRL1_MEM_ADDR, reg << RTL9300_I2C_CTRL1_MEM_ADDR,
RTL9300_I2C_CTRL1);
}
static void rtl9310_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len)
{
// Set register address width
REG_MASK(0x3 << RTL9310_I2C_CTRL_MADDR_WIDTH, len << RTL9310_I2C_CTRL_MADDR_WIDTH,
REG_MASK(i2c, 0x3 << RTL9310_I2C_CTRL_MADDR_WIDTH, len << RTL9310_I2C_CTRL_MADDR_WIDTH,
RTL9310_I2C_CTRL);
// Set register address
writel(reg, REG(RTL9310_I2C_MEMADDR));
writel(reg, REG(i2c, RTL9310_I2C_MEMADDR));
}
static void rtl9300_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_num)
@ -52,10 +52,10 @@ static void rtl9300_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_
u32 v;
// Set SCL pin
REG_MASK(0, BIT(RTL9300_I2C_CTRL1_GPIO8_SCL_SEL), RTL9300_I2C_CTRL1);
REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_GPIO8_SCL_SEL), RTL9300_I2C_CTRL1);
// Set SDA pin
REG_MASK(0x7 << RTL9300_I2C_CTRL1_SDA_OUT_SEL,
REG_MASK(i2c, 0x7 << RTL9300_I2C_CTRL1_SDA_OUT_SEL,
i2c->sda_num << RTL9300_I2C_CTRL1_SDA_OUT_SEL, RTL9300_I2C_CTRL1);
// Set SDA pin to I2C functionality
@ -69,10 +69,10 @@ static void rtl9310_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_
u32 v;
// Set SCL pin
REG_MASK(0, BIT(RTL9310_I2C_MST_IF_SEL_GPIO_SCL_SEL + scl_num), RTL9310_I2C_MST_IF_SEL);
REG_MASK(i2c, 0, BIT(RTL9310_I2C_MST_IF_SEL_GPIO_SCL_SEL + scl_num), RTL9310_I2C_MST_IF_SEL);
// Set SDA pin
REG_MASK(0x7 << RTL9310_I2C_CTRL_SDA_OUT_SEL,
REG_MASK(i2c, 0x7 << RTL9310_I2C_CTRL_SDA_OUT_SEL,
i2c->sda_num << RTL9310_I2C_CTRL_SDA_OUT_SEL, RTL9310_I2C_CTRL);
// Set SDA pin to I2C functionality
@ -84,19 +84,19 @@ static void rtl9310_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_
static int rtl9300_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
{
// Set bus frequency
REG_MASK(0x3 << RTL9300_I2C_CTRL2_SCL_FREQ,
REG_MASK(i2c, 0x3 << RTL9300_I2C_CTRL2_SCL_FREQ,
i2c->bus_freq << RTL9300_I2C_CTRL2_SCL_FREQ, RTL9300_I2C_CTRL2);
// Set slave device address
REG_MASK(0x7f << RTL9300_I2C_CTRL2_DEV_ADDR,
REG_MASK(i2c, 0x7f << RTL9300_I2C_CTRL2_DEV_ADDR,
addr << RTL9300_I2C_CTRL2_DEV_ADDR, RTL9300_I2C_CTRL2);
// Set data length
REG_MASK(0xf << RTL9300_I2C_CTRL2_DATA_WIDTH,
REG_MASK(i2c, 0xf << RTL9300_I2C_CTRL2_DATA_WIDTH,
((len - 1) & 0xf) << RTL9300_I2C_CTRL2_DATA_WIDTH, RTL9300_I2C_CTRL2);
// Set read mode to random
REG_MASK(0x1 << RTL9300_I2C_CTRL2_READ_MODE, 0, RTL9300_I2C_CTRL2);
REG_MASK(i2c, 0x1 << RTL9300_I2C_CTRL2_READ_MODE, 0, RTL9300_I2C_CTRL2);
return 0;
}
@ -104,19 +104,19 @@ static int rtl9300_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
static int rtl9310_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
{
// Set bus frequency
REG_MASK(0x3 << RTL9310_I2C_CTRL_SCL_FREQ,
REG_MASK(i2c, 0x3 << RTL9310_I2C_CTRL_SCL_FREQ,
i2c->bus_freq << RTL9310_I2C_CTRL_SCL_FREQ, RTL9310_I2C_CTRL);
// Set slave device address
REG_MASK(0x7f << RTL9310_I2C_CTRL_DEV_ADDR,
REG_MASK(i2c, 0x7f << RTL9310_I2C_CTRL_DEV_ADDR,
addr << RTL9310_I2C_CTRL_DEV_ADDR, RTL9310_I2C_CTRL);
// Set data length
REG_MASK(0xf << RTL9310_I2C_CTRL_DATA_WIDTH,
REG_MASK(i2c, 0xf << RTL9310_I2C_CTRL_DATA_WIDTH,
((len - 1) & 0xf) << RTL9310_I2C_CTRL_DATA_WIDTH, RTL9310_I2C_CTRL);
// Set read mode to random
REG_MASK(0x1 << RTL9310_I2C_CTRL_READ_MODE, 0, RTL9310_I2C_CTRL);
REG_MASK(i2c, 0x1 << RTL9310_I2C_CTRL_READ_MODE, 0, RTL9310_I2C_CTRL);
return 0;
}
@ -161,32 +161,32 @@ static int i2c_write(void __iomem *r0, u8 *buf, int len)
static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len)
{
return i2c_read(REG(RTL9300_I2C_DATA_WORD0), buf, len);
return i2c_read(REG(i2c, RTL9300_I2C_DATA_WORD0), buf, len);
}
static int rtl9300_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len)
{
return i2c_write(REG(RTL9300_I2C_DATA_WORD0), buf, len);
return i2c_write(REG(i2c, RTL9300_I2C_DATA_WORD0), buf, len);
}
static int rtl9310_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len)
{
return i2c_read(REG(RTL9310_I2C_DATA), buf, len);
return i2c_read(REG(i2c, RTL9310_I2C_DATA), buf, len);
}
static int rtl9310_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len)
{
return i2c_write(REG(RTL9310_I2C_DATA), buf, len);
return i2c_write(REG(i2c, RTL9310_I2C_DATA), buf, len);
}
static void rtl9300_writel(struct rtl9300_i2c *i2c, u32 data)
{
writel(data, REG(RTL9300_I2C_DATA_WORD0));
writel(data, REG(i2c, RTL9300_I2C_DATA_WORD0));
}
static void rtl9310_writel(struct rtl9300_i2c *i2c, u32 data)
{
writel(data, REG(RTL9310_I2C_DATA));
writel(data, REG(i2c, RTL9310_I2C_DATA));
}
@ -196,13 +196,13 @@ static int rtl9300_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
u32 v;
if (read_write == I2C_SMBUS_READ)
REG_MASK(BIT(RTL9300_I2C_CTRL1_RWOP), 0, RTL9300_I2C_CTRL1);
REG_MASK(i2c, BIT(RTL9300_I2C_CTRL1_RWOP), 0, RTL9300_I2C_CTRL1);
else
REG_MASK(0, BIT(RTL9300_I2C_CTRL1_RWOP), RTL9300_I2C_CTRL1);
REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_RWOP), RTL9300_I2C_CTRL1);
REG_MASK(0, BIT(RTL9300_I2C_CTRL1_I2C_TRIG), RTL9300_I2C_CTRL1);
REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_I2C_TRIG), RTL9300_I2C_CTRL1);
do {
v = readl(REG(RTL9300_I2C_CTRL1));
v = readl(REG(i2c, RTL9300_I2C_CTRL1));
} while (v & BIT(RTL9300_I2C_CTRL1_I2C_TRIG));
if (v & BIT(RTL9300_I2C_CTRL1_I2C_FAIL))
@ -210,9 +210,9 @@ static int rtl9300_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
if (read_write == I2C_SMBUS_READ) {
if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA){
data->byte = readl(REG(RTL9300_I2C_DATA_WORD0));
data->byte = readl(REG(i2c, RTL9300_I2C_DATA_WORD0));
} else if (size == I2C_SMBUS_WORD_DATA) {
data->word = readl(REG(RTL9300_I2C_DATA_WORD0));
data->word = readl(REG(i2c, RTL9300_I2C_DATA_WORD0));
} else if (len > 0) {
rtl9300_i2c_read(i2c, &data->block[0], len);
}
@ -227,13 +227,13 @@ static int rtl9310_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
u32 v;
if (read_write == I2C_SMBUS_READ)
REG_MASK(BIT(RTL9310_I2C_CTRL_RWOP), 0, RTL9310_I2C_CTRL);
REG_MASK(i2c, BIT(RTL9310_I2C_CTRL_RWOP), 0, RTL9310_I2C_CTRL);
else
REG_MASK(0, BIT(RTL9310_I2C_CTRL_RWOP), RTL9310_I2C_CTRL);
REG_MASK(i2c, 0, BIT(RTL9310_I2C_CTRL_RWOP), RTL9310_I2C_CTRL);
REG_MASK(0, BIT(RTL9310_I2C_CTRL_I2C_TRIG), RTL9310_I2C_CTRL);
REG_MASK(i2c, 0, BIT(RTL9310_I2C_CTRL_I2C_TRIG), RTL9310_I2C_CTRL);
do {
v = readl(REG(RTL9310_I2C_CTRL));
v = readl(REG(i2c, RTL9310_I2C_CTRL));
} while (v & BIT(RTL9310_I2C_CTRL_I2C_TRIG));
if (v & BIT(RTL9310_I2C_CTRL_I2C_FAIL))
@ -241,9 +241,9 @@ static int rtl9310_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
if (read_write == I2C_SMBUS_READ) {
if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA){
data->byte = readl(REG(RTL9310_I2C_DATA));
data->byte = readl(REG(i2c, RTL9310_I2C_DATA));
} else if (size == I2C_SMBUS_WORD_DATA) {
data->word = readl(REG(RTL9310_I2C_DATA));
data->word = readl(REG(i2c, RTL9310_I2C_DATA));
} else if (len > 0) {
rtl9310_i2c_read(i2c, &data->block[0], len);
}

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@ -0,0 +1,293 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* I2C multiplexer for the 2 I2C Masters of the RTL9300
* with up to 8 channels each, but which are not entirely
* independent of each other
*/
#include <linux/i2c-mux.h>
#include <linux/module.h>
#include <linux/mux/consumer.h>
#include <linux/of_device.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include "../busses/i2c-rtl9300.h"
#define NUM_MASTERS 2
#define NUM_BUSSES 8
#define REG(mst, x) (mux->base + x + (mst ? mux->i2c->mst2_offset : 0))
#define REG_MASK(mst, clear, set, reg) \
writel((readl(REG((mst),(reg))) & ~(clear)) | (set), REG((mst),(reg)))
struct channel {
u8 sda_num;
u8 scl_num;
};
static struct channel channels[NUM_MASTERS * NUM_BUSSES];
struct rtl9300_mux {
void __iomem *base;
struct device *dev;
struct i2c_adapter *parent;
struct rtl9300_i2c * i2c;
};
struct i2c_mux_data {
int scl0_pin;
int scl1_pin;
int sda0_pin;
int sda_pins;
int (*i2c_mux_select)(struct i2c_mux_core *muxc, u32 chan);
int (*i2c_mux_deselect)(struct i2c_mux_core *muxc, u32 chan);
void (*sda_sel)(struct i2c_mux_core *muxc, int pin);
};
static int rtl9300_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
{
struct rtl9300_mux *mux = i2c_mux_priv(muxc);
// Set SCL pin
REG_MASK(channels[chan].scl_num, 0,
BIT(RTL9300_I2C_CTRL1_GPIO8_SCL_SEL), RTL9300_I2C_CTRL1);
// Set SDA pin
REG_MASK(channels[chan].scl_num, 0x7 << RTL9300_I2C_CTRL1_SDA_OUT_SEL,
channels[chan].sda_num << RTL9300_I2C_CTRL1_SDA_OUT_SEL, RTL9300_I2C_CTRL1);
mux->i2c->sda_num = channels[chan].sda_num;
mux->i2c->scl_num = channels[chan].scl_num;
return 0;
}
static int rtl9310_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
{
struct rtl9300_mux *mux = i2c_mux_priv(muxc);
// Set SCL pin
REG_MASK(0, 0, BIT(RTL9310_I2C_MST_IF_SEL_GPIO_SCL_SEL + channels[chan].scl_num),
RTL9310_I2C_MST_IF_SEL);
// Set SDA pin
REG_MASK(channels[chan].scl_num, 0xf << RTL9310_I2C_CTRL_SDA_OUT_SEL,
channels[chan].sda_num << RTL9310_I2C_CTRL_SDA_OUT_SEL, RTL9310_I2C_CTRL);
mux->i2c->sda_num = channels[chan].sda_num;
mux->i2c->scl_num = channels[chan].scl_num;
return 0;
}
static int rtl9300_i2c_mux_deselect(struct i2c_mux_core *muxc, u32 chan)
{
return 0;
}
static void rtl9300_sda_sel(struct i2c_mux_core *muxc, int pin)
{
struct rtl9300_mux *mux = i2c_mux_priv(muxc);
u32 v;
// Set SDA pin to I2C functionality
v = readl(REG(0, RTL9300_I2C_MST_GLB_CTRL));
v |= BIT(pin);
writel(v, REG(0, RTL9300_I2C_MST_GLB_CTRL));
}
static void rtl9310_sda_sel(struct i2c_mux_core *muxc, int pin)
{
struct rtl9300_mux *mux = i2c_mux_priv(muxc);
u32 v;
// Set SDA pin to I2C functionality
v = readl(REG(0, RTL9310_I2C_MST_IF_SEL));
v |= BIT(pin);
writel(v, REG(0, RTL9310_I2C_MST_IF_SEL));
}
static struct device_node *mux_parent_adapter(struct device *dev, struct rtl9300_mux *mux)
{
struct device_node *node = dev->of_node;
struct device_node *parent_np;
struct i2c_adapter *parent;
parent_np = of_parse_phandle(node, "i2c-parent", 0);
if (!parent_np) {
dev_err(dev, "Cannot parse i2c-parent\n");
return ERR_PTR(-ENODEV);
}
parent = of_find_i2c_adapter_by_node(parent_np);
of_node_put(parent_np);
if (!parent)
return ERR_PTR(-EPROBE_DEFER);
if (!(of_device_is_compatible(parent_np, "realtek,rtl9300-i2c")
|| of_device_is_compatible(parent_np, "realtek,rtl9310-i2c"))){
dev_err(dev, "I2C parent not an RTL9300 I2C controller\n");
return ERR_PTR(-ENODEV);
}
mux->parent = parent;
mux->i2c = (struct rtl9300_i2c *)i2c_get_adapdata(parent);
mux->base = mux->i2c->base;
return parent_np;
}
struct i2c_mux_data rtl9300_i2c_mux_data = {
.scl0_pin = 8,
.scl1_pin = 17,
.sda0_pin = 9,
.sda_pins = 8,
.i2c_mux_select = rtl9300_i2c_mux_select,
.i2c_mux_deselect = rtl9300_i2c_mux_deselect,
.sda_sel = rtl9300_sda_sel,
};
struct i2c_mux_data rtl9310_i2c_mux_data = {
.scl0_pin = 13,
.scl1_pin = 14,
.sda0_pin = 0,
.sda_pins = 16,
.i2c_mux_select = rtl9310_i2c_mux_select,
.i2c_mux_deselect = rtl9300_i2c_mux_deselect,
.sda_sel = rtl9310_sda_sel,
};
static const struct of_device_id rtl9300_i2c_mux_of_match[] = {
{ .compatible = "realtek,i2c-mux-rtl9300", .data = (void *) &rtl9300_i2c_mux_data},
{ .compatible = "realtek,i2c-mux-rtl9310", .data = (void *) &rtl9310_i2c_mux_data},
{},
};
MODULE_DEVICE_TABLE(of, rtl9300_i2c_mux_of_match);
static int rtl9300_i2c_mux_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct device_node *node = dev->of_node;
struct device_node *parent_np;
struct device_node *child;
struct i2c_mux_core *muxc;
struct rtl9300_mux *mux;
struct i2c_mux_data *mux_data;
int children;
int ret;
pr_info("%s probing I2C adapter\n", __func__);
if (!node) {
dev_err(dev, "No DT found\n");
return -EINVAL;
}
mux = devm_kzalloc(dev, sizeof(*mux), GFP_KERNEL);
if (!mux)
return -ENOMEM;
mux->dev = dev;
mux_data = (struct i2c_mux_data *) device_get_match_data(dev);
parent_np = mux_parent_adapter(dev, mux);
if (IS_ERR(parent_np))
return dev_err_probe(dev, PTR_ERR(parent_np), "i2c-parent adapter not found\n");
pr_info("%s base memory %08x\n", __func__, (u32)mux->base);
children = of_get_child_count(node);
muxc = i2c_mux_alloc(mux->parent, dev, children, 0, 0,
mux_data->i2c_mux_select, mux_data->i2c_mux_deselect);
if (!muxc) {
ret = -ENOMEM;
goto err_parent;
}
muxc->priv = mux;
platform_set_drvdata(pdev, muxc);
for_each_child_of_node(node, child) {
u32 chan;
u32 pin;
ret = of_property_read_u32(child, "reg", &chan);
if (ret < 0) {
dev_err(dev, "no reg property for node '%pOFn'\n",
child);
goto err_children;
}
if (chan >= NUM_MASTERS * NUM_BUSSES) {
dev_err(dev, "invalid reg %u\n", chan);
ret = -EINVAL;
goto err_children;
}
if (of_property_read_u32(child, "scl-pin", &pin)) {
dev_warn(dev, "SCL pin not found in DT, using default\n");
pin = mux_data->scl0_pin;
}
if (!(pin == mux_data->scl0_pin || pin == mux_data->scl1_pin)) {
dev_warn(dev, "SCL pin %d not supported\n", pin);
ret = -EINVAL;
goto err_children;
}
channels[chan].scl_num = pin == mux_data->scl0_pin ? 0 : 1;
pr_info("%s channel %d scl_num %d\n", __func__, chan, channels[chan].scl_num);
if (of_property_read_u32(child, "sda-pin", &pin)) {
dev_warn(dev, "SDA pin not found in DT, using default \n");
pin = mux_data->sda0_pin;
}
channels[chan].sda_num = pin - mux_data->sda0_pin;
if (channels[chan].sda_num < 0 || channels[chan].sda_num >= mux_data->sda_pins) {
dev_warn(dev, "SDA pin %d not supported\n", pin);
return -EINVAL;
}
pr_info("%s channel %d sda_num %d\n", __func__, chan, channels[chan].sda_num);
mux_data->sda_sel(muxc, channels[chan].sda_num);
ret = i2c_mux_add_adapter(muxc, 0, chan, 0);
if (ret)
goto err_children;
}
dev_info(dev, "%d-port mux on %s adapter\n", children, mux->parent->name);
return 0;
err_children:
i2c_mux_del_adapters(muxc);
err_parent:
i2c_put_adapter(mux->parent);
return ret;
}
static int rtl9300_i2c_mux_remove(struct platform_device *pdev)
{
struct i2c_mux_core *muxc = platform_get_drvdata(pdev);
i2c_mux_del_adapters(muxc);
i2c_put_adapter(muxc->parent);
return 0;
}
static struct platform_driver i2c_mux_driver = {
.probe = rtl9300_i2c_mux_probe,
.remove = rtl9300_i2c_mux_remove,
.driver = {
.name = "i2c-mux-rtl9300",
.of_match_table = rtl9300_i2c_mux_of_match,
},
};
module_platform_driver(i2c_mux_driver);
MODULE_DESCRIPTION("RTL9300 I2C multiplexer driver");
MODULE_AUTHOR("Birger Koblitz");
MODULE_LICENSE("GPL v2");

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@ -0,0 +1,27 @@
--- a/drivers/i2c/muxes/Kconfig
+++ b/drivers/i2c/muxes/Kconfig
@@ -99,6 +99,15 @@ config I2C_MUX_REG
This driver can also be built as a module. If so, the module
will be called i2c-mux-reg.
+config I2C_MUX_RTL9300
+ tristate "RTL9300 based I2C multiplexer"
+ help
+ If you say yes to this option, support will be included for a
+ RTL9300 based I2C multiplexer.
+
+ This driver can also be built as a module. If so, the module
+ will be called i2c-mux-reg.
+
config I2C_DEMUX_PINCTRL
tristate "pinctrl-based I2C demultiplexer"
depends on PINCTRL && OF
--- a/drivers/i2c/muxes/Makefile
+++ b/drivers/i2c/muxes/Makefile
@@ -14,5 +14,6 @@ obj-$(CONFIG_I2C_MUX_PCA9541) += i2c-mux
obj-$(CONFIG_I2C_MUX_PCA954x) += i2c-mux-pca954x.o
obj-$(CONFIG_I2C_MUX_PINCTRL) += i2c-mux-pinctrl.o
obj-$(CONFIG_I2C_MUX_REG) += i2c-mux-reg.o
+obj-$(CONFIG_I2C_MUX_RTL9300) += i2c-mux-rtl9300.o
ccflags-$(CONFIG_I2C_DEBUG_BUS) := -DDEBUG