Commit Graph

18 Commits

Author SHA1 Message Date
Sungbo Eo
cb1dc49c18 ipq40xx: consolidate ar40xx driver files
Commit f4fb63d2ab ("ipq40xx: 5.10: move AR40xx to MDIO drivers") moved
the ar40xx driver files to kernel version specific directories to place
them in different subdirectory in kernel tree. But now kernel 5.4 is
gone and there is no reason to keep them separate. Move them back to
common files/ directory.

Signed-off-by: Sungbo Eo <mans0n@gorani.run>
2022-05-05 09:19:00 +09:00
Ansuel Smith
7c692f685b ipq40xx: refresh ess driver and phy with new api
Kernel 5.15 have some new api for ethtool and phy.
Add ifdef to fix compilation error.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Reviewed-by: Robert Marko <robert.marko@sartura.hr>
2022-05-01 13:40:13 +09:00
Robert Marko
f4fb63d2ab ipq40xx: 5.10: move AR40xx to MDIO drivers
MDIO drivers were moved into their own sub directory of networking drivers.
This has caused the AR40xx driver to probe before MDIO drivers and that wont
work as it depends on the MDIO bus to be up so it can be fetched.

Lets solve it by moving the AR40xx into MDIO folder so they get probed like
before.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2021-09-25 19:28:54 +02:00
Robert Marko
ccf214a408 ipq40xx: net: ethernet: edma: reject unsupported coalescing params
Set ethtool_ops->supported_coalesce_params to let
the core reject unsupported coalescing parameters.

This driver did not previously reject unsupported parameters.

This is a required ethtool op since kernel 5.7.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2021-09-25 19:28:54 +02:00
Robert Marko
603848cad8 ipq40xx: net: ethernet: edma: update of_get_phy_mode() for 5.10
In kernel v5.5 of_get_phy_mode had its API changed, so its now returning 0
or errors instead of phymode.

Phymode is now returning by passing a pointer to phy_interface_t where it
will be stored.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2021-09-25 19:28:54 +02:00
David Bauer
4d81f08771 ipq40xx: ar40xx: reset port status register
This resolves incosnsitencies of the configured RX / TX flow control
modes between different boards or bootloaders.

Signed-off-by: David Bauer <mail@david-bauer.net>
2021-08-14 14:48:07 +02:00
David Bauer
685c790e9f ipq40xx: ar40xx: use FIELD_GET macro
This improves code readability.

Signed-off-by: David Bauer <mail@david-bauer.net>
2021-08-14 14:47:51 +02:00
Ansuel Smith
91a52f22a1 treewide: backport support for nvmem on non platform devices
In the current state, nvmem cells are only detected on platform device.
To quickly fix the problem, we register the affected problematic driver
with the of_platform but that is more an hack than a real solution.
Backport from net-next the required patch so that nvmem can work also
with non-platform devices and rework our current patch.
Drop the mediatek and dsa workaround and rework the ath10k patches.
Rework every driver that use the of_get_mac_address api.

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
2021-08-05 01:46:26 +02:00
Robert Marko
7f2d9ccd09 ipq40xx: net: phy: qca807x: fix GPIO driver
While rebasing into setting bits instead of magic values,
I accidentally forgot to actually set the force bit.

Without it using the pins as GPIO-s did not actually work.

Fixes: b5c93ed ("ipq40xx: add Qualcomm QCA807x driver")

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2021-03-05 00:28:35 +01:00
Robert Marko
fd033364f6 ipq40xx: net: ethernet: edma: use generic PHY print
Lets use the generic upstream phy_print_status() instead of doing 
something similar by hand.

Before:
ess_edma c080000.edma: eth1: GMAC Link is up with phy_speed=1000

After:
ess_edma c080000.edma eth1: Link is Up - 1Gbps/Full - flow control rx/tx

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-12-23 16:36:08 +01:00
Robert Marko
9d69505194 ipq40xx: net: ethernet: edma: use generic ksettings functions
Since we now have a proper PHY driver for QCA807x and AR803x has already
been supported properly there is no need for the driver to be poking
on PHY registers for ethtool ops.

So, lets simply use the generic
phy_ethtool_ksettings_get/phy_ethtool_ksettings_set functions.

This also has the advantage of properly populating stuff other than
speeds like, transceiver type, MDI-X etc.

ethtool before:
root@OpenWrt:/# ethtool eth1
Settings for eth1:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Supported pause frame use: Symmetric Receive-only
        Supports auto-negotiation: Yes
        Supported FEC modes: Not reported
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Advertised pause frame use: Symmetric Receive-only
        Advertised auto-negotiation: Yes
        Advertised FEC modes: Not reported
        Link partner advertised link modes:  10baseT/Half 10baseT/Full
                                             100baseT/Half 100baseT/Full
                                             1000baseT/Full
        Link partner advertised pause frame use: No
        Link partner advertised auto-negotiation: No
        Link partner advertised FEC modes: Not reported
        Speed: 1000Mb/s
        Duplex: Full
        Port: Twisted Pair
        PHYAD: 4
        Transceiver: internal
        Auto-negotiation: on
        MDI-X: Unknown
        Supports Wake-on: d
        Wake-on: d
        Current message level: 0x00000000 (0)

        Link detected: yes

ethtool after:
root@OpenWrt:/# ethtool eth1
Settings for eth1:
        Supported ports: [ TP MII ]
        Supported link modes:   10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Supported pause frame use: Symmetric Receive-only
        Supports auto-negotiation: Yes
        Supported FEC modes: Not reported
        Advertised link modes:  10baseT/Half 10baseT/Full
                                100baseT/Half 100baseT/Full
                                1000baseT/Full
                                1000baseX/Full
        Advertised pause frame use: Symmetric Receive-only
        Advertised auto-negotiation: Yes
        Advertised FEC modes: Not reported
        Link partner advertised link modes:  10baseT/Half 10baseT/Full
                                             100baseT/Half 100baseT/Full
                                             1000baseT/Full
        Link partner advertised pause frame use: Symmetric Receive-only
        Link partner advertised auto-negotiation: Yes
        Link partner advertised FEC modes: Not reported
        Speed: 1000Mb/s
        Duplex: Full
        Port: Twisted Pair
        PHYAD: 4
        Transceiver: external
        Auto-negotiation: on
        MDI-X: off (auto)
        Supports Wake-on: d
        Wake-on: d
        Current message level: 0x00000000 (0)

        Link detected: yes

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-12-23 16:36:08 +01:00
Robert Marko
053c3d8e0b ipq40xx: net: ethernet: edma: fix link detection
PHY needs to be soft reset before starting it from ethernet driver as
AR40xx calibration will leave it in unwanted state.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-12-23 16:36:08 +01:00
Robert Marko
26b1f72381 ipq40xx: net: phy: ar40xx: remove PHY handling
Since we now have proper PHY driver for the QCA807x PHY-s, lets remove
PHY handling from AR40xx.

This removes PHY driver, PHY GPIO driver and PHY init code.
AR40xx still needs to handle PSGMII calibration as that requires R/W
from the switch, so I am unable to move it into PHY driver.

This also converted the AR40xx driver to use OF_MDIO to find the MDIO
bus as it now cant be set through the PHY driver.
So lets depend on OF_MDIO in KConfig.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-12-23 16:36:08 +01:00
Robert Marko
b5c93edd74 ipq40xx: add Qualcomm QCA807x driver
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.

They are 2 or 5 port IEEE 802.3 clause 22 compliant
10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.

They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC,
while second one is SGMII for connection to MAC or fiber.

Both models have a combo port that supports 1000BASE-X and 100BASE-FX
fiber.

Each PHY inside of QCA807x series has 2 digitally controlled output only
pins that natively drive LED-s.
But some vendors used these to driver generic LED-s controlled by
user space, so lets enable registering each PHY as GPIO controller and
add driver for it.

This also adds the ability to specify DT properties so that 1000 Base-T
LED will also be lit up for 100 and 10 Base connections.

This is usually done by U-boot, but boards running mainline U-boot are
not configuring this yet.

These PHY-s are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x
boards.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-12-23 16:36:08 +01:00
Robert Marko
03bae3cafd ipq40xx: edma: convert to of_mdio_find_bus()
With the reworked MDIO driver, EDMA will fail to get the MII BUS as it
used the MII BUS stored inside the MDIO structure private data.

This obviously does not work with the modernized driver, so lets switch
to using a purpose build of_mdio_find_bus() which will return the MII
BUS and only requires the MDIO node to be passed.
This is easy as we already have the node parsed.

Also, since we now require OF_MDIO add that as dependency.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
2020-12-23 16:36:08 +01:00
David Bauer
cdc8d4b46f ipq40xx: revert usage of VLAN S-TAG
This reverts the usage of the S-Tag for separating LAN and WAN port on
the embedded switch. Many users complained about not being able to
manage C-Tag addition / removal on the switch as well as degraded
performance.

Fixes: commit 9da2b56760 ("ipq40xx: fix ethernet vlan double tagging")

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-12-14 01:13:30 +01:00
David Bauer
e73d866c6f ipq40xx: enable RX hash / CTAG TX offloading for single-phy
This re-enables offloading features disabled by
commit 9da2b56760 ("ipq40xx: fix ethernet vlan double tagging").

Single-PHY devices use port-based VLANs on the switch, therefore no
S-TAG magic is involved here. Re-enabling these features restores
throughput back to 950 Mbit/s.

Reported-by: Jannis Pinter <jannis@pinterjann.is>
Signed-off-by: David Bauer <mail@david-bauer.net>
2020-11-01 15:30:22 +01:00
Adrian Schmutzler
a7afeb3142 ipq40xx: remove support for kernel 4.19
The target uses 5.4 as default kernel since 03/2020.

Kernel 4.19 support is not really maintained anymore, it does not
seem to be needed, and removing it will make upcoming driver
updates easier. Thus, remove it.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-10-19 15:30:44 +02:00