7b19770525
I-O DATA BSH-G24MB is a 24 port gigabit switch, based on RTL8382M.
Specification:
- SoC : Realtek RTL8382M
- RAM : DDR2 128 MiB (Nanya NT5TU128M8HE-AC)
- Flash : SPI-NOR 16 MiB (Macronix MX25L12835FM2I-10G)
- Ethernet : 10/100/1000 Mbps x24
- port 1-8 : RTL8218B
- port 9-16 : RTL8218B (SoC)
- port 17-24 : RTL8218B
- LEDs/Keys : 2x, 1x
- UART : pin header on PCB
- JP2: 3.3V, TX, RX, GND from rear side
- 115200n8
- Power : 100 VAC, 50/60 Hz
- Plug : IEC 60320-C13
Flash instruction using sysupgrade image:
1. Boot BSH-G24MB normally
2. Connect BSH-G24MB to the DHCP enabled network
3. Find the device's IP address and open the WebUI and login
Note: by default, the device obtains IP address from DHCP server of
the network
4. Open firmware update page ("ファームウェア アップデート")
5. Rename the OpenWrt sysupgrade image to "bsh-g24mb_v100.image" and
select it
6. Press apply ("適用") button to perform update
7. Wait ~150 seconds to complete flashing
Note:
- BSH-G24MB has a power-related LED ("電源"), but it's not connected to
the GPIO of the SoC or RTL8231 and cannot be controlled. Instead of
it, use system status LED on other than running-state.
- "sys_loop" LED indicates system status and loop-detection status in
stock firmware.
- BSH-G24MB has 2x os-image partitions named as "RUNTIME"/"RUNTIME2" in
16 MiB SPI-NOR flash and the size of image per partition is only
6848 KiB. The secondary image is never used on stock firmware, so also
use it on OpenWrt to get more space.
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
198 lines
3.6 KiB
Plaintext
198 lines
3.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "iodata,bsh-g24mb", "realtek,rtl838x-soc";
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model = "I-O DATA BSH-G24MB";
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aliases {
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led-boot = &led_sys_loop;
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led-failsafe = &led_sys_loop;
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led-upgrade = &led_sys_loop;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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compatible = "gpio-leds";
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led_sys_loop: led {
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label = "red:sys_loop";
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_RED>;
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function = LED_FUNCTION_STATUS;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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gpio1: rtl8231-gpio {
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compatible = "realtek,rtl8231-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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indirect-access-bus-id = <0>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env";
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reg = <0x80000 0x10000>;
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read-only;
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};
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partition@90000 {
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label = "u-boot-env2";
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reg = <0x90000 0x10000>;
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};
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partition@a0000 {
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label = "jffs2_cfg";
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reg = <0xa0000 0x100000>;
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read-only;
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};
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partition@1a0000 {
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label = "jffs2_log";
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reg = <0x1a0000 0x100000>;
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read-only;
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};
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/*
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* use 2x OS partitions in OpenWrt
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*
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* 0x2A0000-0x94FFFF: RUNTIME
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* 0x950000-0xFFFFFF: RUNTIME2 (not used in stock)
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*/
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partition@2a0000 {
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compatible = "openwrt,uimage", "denx,uimage";
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label = "firmware";
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reg = <0x2a0000 0xd60000>;
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openwrt,ih-magic = <0x83800013>;
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};
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};
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};
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};
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ðernet0 {
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mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(0, 1, qsgmii)
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SWITCH_PORT(1, 2, qsgmii)
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SWITCH_PORT(2, 3, qsgmii)
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SWITCH_PORT(3, 4, qsgmii)
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SWITCH_PORT(4, 5, qsgmii)
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SWITCH_PORT(5, 6, qsgmii)
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SWITCH_PORT(6, 7, qsgmii)
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SWITCH_PORT(7, 8, qsgmii)
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SWITCH_PORT(8, 9, internal)
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SWITCH_PORT(9, 10, internal)
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SWITCH_PORT(10, 11, internal)
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SWITCH_PORT(11, 12, internal)
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SWITCH_PORT(12, 13, internal)
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SWITCH_PORT(13, 14, internal)
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SWITCH_PORT(14, 15, internal)
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SWITCH_PORT(15, 16, internal)
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SWITCH_PORT(16, 17, qsgmii)
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SWITCH_PORT(17, 18, qsgmii)
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SWITCH_PORT(18, 19, qsgmii)
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SWITCH_PORT(19, 20, qsgmii)
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SWITCH_PORT(20, 21, qsgmii)
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SWITCH_PORT(21, 22, qsgmii)
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SWITCH_PORT(22, 23, qsgmii)
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SWITCH_PORT(23, 24, qsgmii)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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