25aa65304c
Use a new implementation by using a devfreq driver to scale the shared cache of the krait cpu cores. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
51 lines
1.3 KiB
Diff
51 lines
1.3 KiB
Diff
From ef124ad0ff8abfbf4ebe3fe6d7dcef4541dec13a Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Thu, 16 Jun 2022 18:39:21 +0200
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Subject: [PATCH] ARM: dts: qcom: add krait-cache compatible for ipq806x dtsi
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Add qcom,krait-cache compatible to enable cache devfreq driver for
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ipq806x SoC and move the L2 node to the soc node to make the devfreq
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driver correctly probe.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 22 +++++++++++-----------
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1 file changed, 11 insertions(+), 11 deletions(-)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -69,16 +69,6 @@
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min-residency-us = <3000>;
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};
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};
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-
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- L2: l2-cache {
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- compatible = "cache";
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- cache-level = <2>;
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- qcom,saw = <&saw_l2>;
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-
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- clocks = <&kraitcc 4>;
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- clock-names = "l2";
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- operating-points-v2 = <&opp_table_l2>;
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- };
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};
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opp_table_l2: opp_table_l2 {
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@@ -470,6 +460,16 @@
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ranges;
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compatible = "simple-bus";
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+ L2: l2-cache {
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+ compatible = "cache", "qcom,krait-cache";
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+ cache-level = <2>;
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+ qcom,saw = <&saw_l2>;
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+
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+ clocks = <&kraitcc 4>;
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+ clock-names = "l2";
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+ operating-points-v2 = <&opp_table_l2>;
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+ };
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+
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lpass@28100000 {
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compatible = "qcom,lpass-cpu";
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status = "disabled";
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