tn3399_openwrt/target/linux/ath79/dts/ar7161_siemens_ws-ap3610.dts
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

176 lines
3.0 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "siemens,ws-ap3610", "qca,ar7161";
model = "Siemens WS-AP3610";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
label-mac-device = &eth0;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref";
clock-frequency = <40000000>;
};
leds {
compatible = "gpio-leds";
led_power_green: led_power_green {
label = "green:power";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
};
led_power_red: led_power_red {
label = "red:power";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
led_wlan5_blue {
label = "blue:wlan5";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wlan5_green {
label = "green:wlan5";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
led_wlan2_blue {
label = "blue:wlan2";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_wlan2_green {
label = "green:wlan2";
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
};
};
&pcie0 {
status = "okay";
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
/*
* When the compatible-is missing, PHY autodetection
* is performed, but the PHY-ID reads all 0xff.
*
* Linux does not create the device in this case,
* and the reset is never even de-asserted.
*/
compatible = "ethernet-phy-id0143.bca2",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
resets = <&rst 8>;
reset-names = "phy";
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
};
};
&eth0 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-bak";
reg = <0x40000 0x40000>;
read-only;
};
partition@80000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x80000 0xe00000>;
};
partition@e80000 {
label = "cfg1";
reg = <0xe80000 0x40000>;
read-only;
};
partition@ec0000 {
label = "cfg2";
reg = <0xec0000 0x40000>;
read-only;
};
partition@f00000 {
label = "nvram1";
reg = <0xf00000 0x40000>;
read-only;
};
partition@f40000 {
label = "nvram2";
reg = <0xf40000 0x40000>;
read-only;
};
partition@f80000 {
label = "rsvd1";
reg = <0xf80000 0x40000>;
read-only;
};
partition@fc0000 {
label = "rsvd2";
reg = <0xfc0000 0x40000>;
read-only;
};
};
};
};