tn3399_openwrt/target/linux/ath79/dts/ar9344_ocedo_raccoon.dts
David Bauer 62abbd587d ath79: correct various phy-mode properties
Upstream commit 6d4cd04 changes how the internal delays of the AR803x
based PHYs are enabled. With this commit, all internal delays are
disabled on driver probe and enabled based on the 'phy-mode' property in
the device-tree.

Before this commit, the RX delay was always enabled upon soft-reset
while the TX delay retained it's previous state. A hard reset enabled
the RX delay while the TX delay was disabled.

Because of this inconsistency, wrongly specified PHY-modes were working
correctly while the hardware was in a different state.

Fix the PHY-modes of some affected devices (and clean up misplaced
properties along the way) to keep the devices working flawlessly with
kernels >= 5.1.

Signed-off-by: David Bauer <mail@david-bauer.net>
2019-06-20 08:57:36 +02:00

178 lines
2.7 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344.dtsi"
/ {
model = "OCEDO Raccoon";
compatible = "ocedo,raccoon", "qca,ar9344";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &system;
led-failsafe = &system;
led-running = &system;
led-upgrade = &system;
};
leds {
compatible = "gpio-leds";
power {
label = "raccoon:green:power";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "raccoon:yellow:wlan24";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
system: system {
label = "raccoon:blue:sys";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan5g {
label = "raccoon:red:wlan5";
gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&ref {
clock-frequency = <40000000>;
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&spi {
num-cs = <1>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0x740000>;
};
partition@790000 {
label = "vendor";
reg = <0x790000 0x740000>;
read-only;
};
partition@ed0000 {
label = "data";
reg = <0xed0000 0x110000>;
read-only;
};
partition@fe0000 {
label = "id";
reg = <0xfe0000 0x010000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
compatible = "pci168c,0030";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&art 0xc>;
qca,no-eeprom;
#gpio-cells = <2>;
gpio-controller;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x6>;
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
};
&eth0 {
status = "okay";
pll-data = <0x06000000 0x00000101 0x00001313>;
mtd-mac-address = <&art 0x0>;
phy-mode = "rgmii-id";
phy-handle = <&phy0>;
};