635f111148
In ath79, for several SoCs the console bootargs are defined to the very same value in every device's DTS. Consolidate these definitions in the SoC dtsi files and drop further redundant definitions elsewhere. The only device without any bootargs set has been OpenMesh OM5P-AC V2. This will now inherit the setting from qca955x.dtsi Note that while this tidies up master a lot, it might develop into a frequent pitfall for backports. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
180 lines
3.0 KiB
Plaintext
180 lines
3.0 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "qca955x.dtsi"
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/ {
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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mdio-gpio0 = &mdio2;
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label-mac-device = ð0;
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "tp-link:blue:power";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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wlan2g {
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label = "tp-link:blue:wlan2g";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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wlan5g {
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label = "tp-link:blue:wlan5g";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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lan_link {
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label = "tp-link:green:lan_link";
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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};
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lan_data {
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label = "tp-link:green:lan_data";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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wps_blue {
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label = "tp-link:blue:wps";
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gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
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};
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wps_red {
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label = "tp-link:red:wps";
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gpios = <&gpio 22 GPIO_ACTIVE_HIGH>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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leds {
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label = "LED control button";
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linux,code = <BTN_0>;
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gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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wps {
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label = "WPS button";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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mdio2: mdio {
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compatible = "virtual,mdio-gpio";
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gpios = <&gpio 3 GPIO_ACTIVE_HIGH>, /* MDC */
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<&gpio 1 GPIO_ACTIVE_HIGH>; /* MDIO */
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#address-cells = <1>;
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#size-cells = <0>;
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phy4: ethernet-phy@4 {
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reg = <4>;
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reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&pcie0 {
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status = "okay";
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};
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&uart {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x020000>;
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read-only;
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};
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partition@20000 {
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compatible = "tplink,firmware";
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label = "firmware";
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reg = <0x020000 0x5e0000>;
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};
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partition@600000 {
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label = "partition-table";
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reg = <0x600000 0x010000>;
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read-only;
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};
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info: partition@610000 {
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label = "info";
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reg = <0x610000 0x020000>;
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read-only;
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};
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partition@630000 {
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label = "config";
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reg = <0x630000 0x1c0000>;
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read-only;
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};
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art: partition@7f0000 {
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label = "art";
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reg = <0x7f0000 0x010000>;
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read-only;
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};
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};
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};
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};
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ð0 {
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status = "okay";
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phy-handle = <&phy4>;
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pll-data = <0xa6000000 0x00000101 0x00001616>;
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mtd-mac-address = <&info 0x8>;
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};
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&wmac {
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status = "okay";
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mtd-cal-data = <&art 0x1000>;
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mtd-mac-address = <&info 0x8>;
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mtd-mac-address-increment = <(-1)>;
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};
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