0ff5785c5d
Add the SoC compatible to the individual dts files. Rename the dts files to match the common pattern. Remove dts files wich aren't used and no image in ar71xx exists. Signed-off-by: Mathias Kresin <dev@kresin.me>
104 lines
1.6 KiB
Plaintext
104 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "ar9331.dtsi"
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/ {
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model = "Dragino MS14 (Dragino 2)";
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compatible = "dragino,ms14", "qca,ar9331";
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aliases {
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serial0 = &uart;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x4000000>;
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};
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leds {
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compatible = "gpio-leds";
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wlan {
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label = "dragino2:red:wlan";
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gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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lan {
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label = "dragino2:red:lan";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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wan {
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label = "dragino2:red:wan";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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system {
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label = "dragino2:red:system";
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gpios = <&gpio 28 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <100>;
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button@0 {
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label = "jumpstart";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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};
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button@1 {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&ref {
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clock-frequency = <25000000>;
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};
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&uart {
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status = "okay";
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};
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&gpio {
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status = "okay";
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};
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&usb {
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dr_mode = "host";
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&spi {
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num-chipselects = <1>;
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status = "okay";
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/* Winbond 25Q128BVFG SPI flash */
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spiflash: w25q128@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "winbond,w25q128", "jedec,spi-nor";
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spi-max-frequency = <104000000>;
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reg = <0>;
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};
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};
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