55be011a71
This backports GD SPI NAND support from nand/next to v5.10 Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
59 lines
2.3 KiB
Diff
59 lines
2.3 KiB
Diff
From 573eec222bc82fb5e724586267fbbb1aed9ffd03 Mon Sep 17 00:00:00 2001
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From: Chuanhong Guo <gch981213@gmail.com>
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Date: Sun, 20 Mar 2022 17:59:58 +0800
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Subject: [PATCH 2/5] mtd: spinand: gigadevice: add support for GD5FxGQ4xExxG
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Add support for:
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GD5F1GQ4RExxG
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GD5F2GQ4{U,R}ExxG
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These chips differ from GD5F1GQ4UExxG only in chip ID, voltage
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and capacity.
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Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
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Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-3-gch981213@gmail.com
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---
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drivers/mtd/nand/spi/gigadevice.c | 30 ++++++++++++++++++++++++++++++
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1 file changed, 30 insertions(+)
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--- a/drivers/mtd/nand/spi/gigadevice.c
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+++ b/drivers/mtd/nand/spi/gigadevice.c
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@@ -333,6 +333,36 @@ static const struct spinand_info gigadev
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
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gd5fxgq4uexxg_ecc_get_status)),
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+ SPINAND_INFO("GD5F1GQ4RExxG",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xc1),
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+ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
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+ gd5fxgq4uexxg_ecc_get_status)),
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+ SPINAND_INFO("GD5F2GQ4UExxG",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xd2),
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
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+ gd5fxgq4uexxg_ecc_get_status)),
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+ SPINAND_INFO("GD5F2GQ4RExxG",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xc2),
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout,
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+ gd5fxgq4uexxg_ecc_get_status)),
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SPINAND_INFO("GD5F1GQ4UFxxG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE, 0xb1, 0x48),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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