a1ad837735
For a TX->TX connected external phy to transmit/receive data, the rgmii2 pin group needs to be claimed with gpio function, at least for EdgeRouter X SFP. We already claim the pin group under the pinctrl node with gpio function on the gpio node on mt7621_ubnt_edgerouter-x.dtsi. However, we should claim a pin group under its consumer node. It's the ethernet node in this case, which we already claim the rgmii2 pin group under it on mt7621.dtsi. Therefore, set the function as gpio on the rgmii2 node for EdgeRouter X SFP and get rid of claiming the rgmii2 pin group under the pinctrl node. With this change, we also get to remove a definition from mt7621_ubnt_edgerouter-x.dtsi which is specific to EdgeRouter X SFP. This change is tested on an EdgeRouter X SFP. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
159 lines
2.5 KiB
Plaintext
159 lines
2.5 KiB
Plaintext
#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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aliases {
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label-mac-device = &gmac0;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_22>;
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nvmem-cell-names = "mac-address";
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label = "dsa";
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "eth0";
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};
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port@1 {
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status = "okay";
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label = "eth1";
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nvmem-cells = <&macaddr_factory_22>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <1>;
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};
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port@2 {
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status = "okay";
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label = "eth2";
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nvmem-cells = <&macaddr_factory_22>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <2>;
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};
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port@3 {
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status = "okay";
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label = "eth3";
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nvmem-cells = <&macaddr_factory_22>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <3>;
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};
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port@4 {
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status = "okay";
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label = "eth4";
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nvmem-cells = <&macaddr_factory_22>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <4>;
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};
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};
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};
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&nand {
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status = "okay";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env";
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reg = <0x80000 0x60000>;
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read-only;
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};
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factory: partition@e0000 {
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label = "factory";
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reg = <0xe0000 0x60000>;
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};
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partition@140000 {
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label = "kernel1";
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reg = <0x140000 0x300000>;
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};
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partition@440000 {
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label = "kernel2";
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reg = <0x440000 0x300000>;
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};
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partition@740000 {
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label = "ubi";
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reg = <0x740000 0xf7c0000>;
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};
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};
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};
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&state_default {
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gpio {
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groups = "uart2", "uart3", "pcie", "jtag";
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function = "gpio";
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};
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};
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&spi0 {
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/*
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* This board has 2Mb spi flash soldered in and visible
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* from manufacturer's firmware.
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* But this SoC shares spi and nand pins,
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* and current driver doesn't handle this sharing well
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*/
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status = "disabled";
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flash@1 {
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compatible = "jedec,spi-nor";
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reg = <1>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "spi";
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reg = <0x0 0x200000>;
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read-only;
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};
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};
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};
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};
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&xhci {
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status = "disabled";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_22: macaddr@22 {
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reg = <0x22 0x6>;
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};
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};
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