tn3399_openwrt/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg1602.dtsi
Arınç ÜNAL f1c9afd801 ramips: mt7621-dts: mux phy0/4 to gmac1
Mux the MT7530 switch's phy0/4 to the SoC's gmac1 on devices where RGMII2
pins are available. This achieves 2 Gbps total bandwidth to the CPU using
the second RGMII.

The ports called "wan" are muxed where possible. On a minority of devices,
this is not possible. Those cases:

mt7621_ampedwireless_ally-r1900k.dts: lan3
mt7621_ubnt_edgerouter-x.dts: eth0
mt7621_gnubee_gb-pc1.dts: ethblue
mt7621_linksys_re6500.dts: lan1
mt7621_netgear_wac104.dts: lan4
mt7621_tplink_eap235-wall-v1.dts: lan0
mt7621_tplink_eap615-wall-v1.dts: lan0
mt7621_ubnt_usw-flex.dts: lan1

The "wan" port is just what the vendor designated on the board/plastic
chasis of the device. On a technical level, there is no difference between
a lan and wan port on MT7621AT, MT7621DAT and MT7621ST SoCs. Prefer
connecting to WAN via the port described above for these devices to benefit
the feature brought with this patch.

mt7621_d-team_newifi-d2.dts cannot benefit this feature, although it looks
like it should, because the rgmii2 pins are wired to unused components.

Tested on a range of devices documented on the GitHub PR.

Link: https://github.com/openwrt/openwrt/pull/10238
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
2022-08-20 22:56:12 +02:00

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#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "zbtlink,zbt-wg1602", "mediatek,mt7621-soc";
aliases {
led-boot = &led_sm;
led-failsafe = &led_sm;
led-running = &led_sm;
led-upgrade = &led_sm;
label-mac-device = &gmac0;
};
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
led_sm: sm {
label = "green:sm";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
4g1 {
label = "green:4g1";
gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
};
4g2 {
label = "green:4g2";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
hw_algo = "toggle";
/* hw_margin_ms is actually ~120s but driver limits it to 60s */
hw_margin_ms = <60000>;
always-running;
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
4g1-pwr {
gpio-export,name = "4g1-pwr";
gpio-export,output = <1>;
gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
};
4g2-pwr {
gpio-export,name = "4g2-pwr";
gpio-export,output = <1>;
gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
};
ext-usb {
gpio-export,name = "ext-usb";
gpio-export,output = <1>;
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
};
};
&sdhci {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
firmware: partition@50000 {
compatible = "denx,uimage";
label = "firmware";
};
};
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi0: wifi@0,0 {
compatible = "pci14c3,7603";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x0000>;
};
};
&pcie1 {
wifi1: wifi@0,0 {
compatible = "pci14c3,7662";
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
};
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_e000>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
status = "okay";
label = "wan";
phy-handle = <&ethphy4>;
nvmem-cells = <&macaddr_factory_e006>;
nvmem-cell-names = "mac-address";
};
&mdio {
ethphy4: ethernet-phy@4 {
reg = <4>;
};
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan1";
};
port@1 {
status = "okay";
label = "lan2";
};
port@2 {
status = "okay";
label = "lan3";
};
port@3 {
status = "okay";
label = "lan4";
};
};
};
&state_default {
gpio {
groups = "i2c", "uart2", "wdt";
function = "gpio";
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_e000: macaddr@e000 {
reg = <0xe000 0x6>;
};
macaddr_factory_e006: macaddr@e006 {
reg = <0xe006 0x6>;
};
};