83b5fbddf2
mtd: spi-nor: locking support for MX25L6405D
Macronix MX25L6405D supports locking with four block-protection bits.
Currently, the driver only sets three bits. If the bootloader does not
sustain the flash chip in an unlocked state, the flash might be
non-writeable. Add the corresponding flag to enable locking support with
four bits in the status register.
mtd: spi-nor: disable 16-bit-sr for macronix
Macronix flash chips seem to consist of only one status register.
These chips will not work with the "16-bit Write Status (01h) Command".
Disable SNOR_F_HAS_16BIT_SR for all Macronix chips.
Refreshed:
- 0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch
Fixes: 15aa53d7ee ("ath79: switch to Kernel 5.10")
Signed-off-by: Nick Hainke <vincent@systemli.org>
35 lines
1.5 KiB
Diff
35 lines
1.5 KiB
Diff
From 8bf2ce6ea4ee840b70f55a27f80e1cd308051b13 Mon Sep 17 00:00:00 2001
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From: Nick Hainke <vincent@systemli.org>
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Date: Mon, 27 Dec 2021 00:38:13 +0100
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Subject: [PATCH 1/2] mtd: spi-nor: locking support for MX25L6405D
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Macronix MX25L6405D supports locking with four block-protection bits.
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Currently, the driver only sets three bits. If the bootloader does not
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sustain the flash chip in an unlocked state, the flash might be
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non-writeable. Add the corresponding flag to enable locking support with
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four bits in the status register.
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Tested on Nanostation M2 XM.
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Similar to commit 7ea40b54e83b ("mtd: spi-nor: enable locking support for
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MX25L12805D")
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Signed-off-by: David Bauer <mail@david-bauer.net>
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Signed-off-by: Nick Hainke <vincent@systemli.org>
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---
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drivers/mtd/spi-nor/macronix.c | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/drivers/mtd/spi-nor/macronix.c
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+++ b/drivers/mtd/spi-nor/macronix.c
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@@ -42,7 +42,8 @@ static const struct flash_info macronix_
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{ "mx25l1606e", INFO(0xc22015, 0, 64 * 1024, 32, SECT_4K) },
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{ "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, SECT_4K) },
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{ "mx25l3255e", INFO(0xc29e16, 0, 64 * 1024, 64, SECT_4K) },
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- { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K) },
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+ { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, SECT_4K |
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+ SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP) },
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{ "mx25u2033e", INFO(0xc22532, 0, 64 * 1024, 4, SECT_4K) },
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{ "mx25u3235f", INFO(0xc22536, 0, 64 * 1024, 64,
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SECT_4K | SPI_NOR_DUAL_READ |
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