d67979b9d6
This is the final bugfix release in the gcc-5 series. Compile and run tested on macOS 10.13 (Xcode 9), mvebu/ar71xx. Removed redundant patch for macOS (backported upstream by yours truly) Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
24 lines
665 B
Diff
24 lines
665 B
Diff
--- a/gcc/config/mips/mips.c
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+++ b/gcc/config/mips/mips.c
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@@ -8001,9 +8001,17 @@ mask_low_and_shift_p (machine_mode mode,
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bool
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and_operands_ok (machine_mode mode, rtx op1, rtx op2)
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{
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- return (memory_operand (op1, mode)
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- ? and_load_operand (op2, mode)
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- : and_reg_operand (op2, mode));
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+ if (!memory_operand (op1, mode))
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+ return and_reg_operand (op2, mode);
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+
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+ if (!and_load_operand (op2, mode))
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+ return false;
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+
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+ if (!TARGET_MIPS16 || si_mask_operand(op2, mode))
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+ return true;
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+
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+ op1 = XEXP (op1, 0);
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+ return !(REG_P (op1) && REGNO (op1) == STACK_POINTER_REGNUM);
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}
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/* The canonical form of a mask-low-and-shift-left operation is
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