e504fdae4e
Add pending patches from Alexander 'lynxis' Couzens which are required for RealTek NBase-T PHYs or SFP+ cages to work when connected to the SGMII interface provided by recent MediaTek SoCs [1]. The patches for MT753x fix link speed limitation on CPU ports observed by many users which is due to reset being carried out wrongly [2]. [1]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669488&state=* [2]: https://patchwork.kernel.org/project/netdevbpf/list/?series=669486&state=* Signed-off-by: Daniel Golle <daniel@makrotopia.org>
48 lines
1.7 KiB
Diff
48 lines
1.7 KiB
Diff
From 952b64575613d26163a5afa5ff8bfdb57840091b Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Mon, 15 Aug 2022 15:00:14 +0200
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Subject: [PATCH 08/10] net: mtk_sgmii: set the speed according to the phy
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interface in AN
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The non auto-negotioting code path is setting the correct speed for the
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interface. Ensure auto-negotiation code path is doing it as well.
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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---
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drivers/net/ethernet/mediatek/mtk_sgmii.c | 11 +++++++++--
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1 file changed, 9 insertions(+), 2 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
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+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
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@@ -21,13 +21,20 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
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}
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/* For SGMII interface mode */
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-static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs)
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+static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs, phy_interface_t interface)
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{
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unsigned int val;
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/* PHYA power down */
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regmap_write(mpcs->regmap, SGMSYS_QPHY_PWR_STATE_CTRL, SGMII_PHYA_PWD);
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+ /* Set SGMII phy speed */
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+ regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
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+ val &= ~RG_PHY_SPEED_MASK;
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+ if (interface == PHY_INTERFACE_MODE_2500BASEX)
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+ val |= RG_PHY_SPEED_3_125G;
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+ regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
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+
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/* Setup the link timer and QPHY power up inside SGMIISYS */
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regmap_write(mpcs->regmap, SGMSYS_PCS_LINK_TIMER,
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SGMII_LINK_TIMER_DEFAULT);
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@@ -100,7 +107,7 @@ static int mtk_pcs_config(struct phylink
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if (interface != PHY_INTERFACE_MODE_SGMII)
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err = mtk_pcs_setup_mode_force(mpcs, interface);
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else if (phylink_autoneg_inband(mode))
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- err = mtk_pcs_setup_mode_an(mpcs);
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+ err = mtk_pcs_setup_mode_an(mpcs, interface);
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return err;
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}
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