8d4c22a956
For all SoC in the ath79 target, the PLL controller provides 3 main clocks "cpu", "ddr" and "ahb" through the input clock "ref". Signed-off-by: Shiji Yang <yangshiji66@qq.com> |
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.. | ||
base-files/etc/hotplug.d/ieee80211 | ||
dts | ||
files | ||
generic | ||
image | ||
mikrotik | ||
nand | ||
patches-5.10 | ||
patches-5.15 | ||
tiny | ||
config-5.10 | ||
config-5.15 | ||
Makefile | ||
modules.mk |