6555612783
This adds PLL settings for the ethernet ports of the TP-Link TL-WR1043
v2/v3 and the Openmesh OM5P-AC-v2.
We also change the PLL-settings in the qca9557.dtsi to match the ones
used as default on the ar71xx target.
As of 4b9680f138 those devices have broken ethernet ports as the default
PLL settings defined in the QCA9557.dtsi are applied which are off for
those devices.
Signed-off-by: David Bauer <mail@david-bauer.net>
172 lines
2.6 KiB
Plaintext
172 lines
2.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "qca9557.dtsi"
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/ {
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compatible = "openmesh,om5p-ac-v2", "qca,qca9557";
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model = "OpenMesh OM5P-AC V2";
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extosc: ref {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-output-names = "ref";
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clock-frequency = <40000000>;
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};
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leds {
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compatible = "gpio-leds";
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power {
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label = "om5pac:blue:power";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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wifi_green {
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label = "om5pac:green:wifi";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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wifi_yellow {
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label = "om5pac:yellow:wifi";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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wifi_red {
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label = "om5pac:red:wifi";
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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default-state = "off";
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <100>;
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button0 {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-export {
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compatible = "gpio-export";
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#size-cells = <0>;
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gpio_pa_dcdc {
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gpio-export,name = "om5pac:pa_dcdc";
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gpio-export,output = <1>;
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gpios = <&gpio 2 GPIO_ACTIVE_HIGH>;
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};
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gpio_pa_high {
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gpio-export,name = "om5pac:pa_high";
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gpio-export,output = <1>;
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gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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&pinmux {
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pinmux_pa_dcdc_pins {
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pinctrl-single,bits = <0x0 0xff00 0x0>;
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};
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pinmux_pa_high_pins {
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pinctrl-single,bits = <0x10 0xff 0x0>;
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};
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};
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&pcie0 {
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status = "okay";
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};
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&uart {
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status = "okay";
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};
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&pll {
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clocks = <&extosc>;
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x040000>;
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read-only;
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};
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partition@1 {
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label = "u-boot-env";
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reg = <0x040000 0x010000>;
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};
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partition@2 {
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label = "firmware";
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reg = <0x850000 0x7a0000>;
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};
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partition@3 {
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label = "ART";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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phy4: ethernet-phy@4 {
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reg = <4>;
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phy-mode = "rgmii-id";
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};
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};
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&mdio1 {
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status = "okay";
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phy1: ethernet-phy@1 {
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reg = <1>;
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phy-mode = "sgmii";
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0x82000101 0x80000101 0x80001313>;
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phy-handle = <&phy4>;
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phy-mode = "rgmii";
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};
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ð1 {
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status = "okay";
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pll-data = <0x03000101 0x80000101 0x80001313>;
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phy-handle = <&phy1>;
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phy-mode = "sgmii";
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};
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