tn3399_openwrt/target/linux/ath79/dts/qca9563_netgear_wndr.dtsi
Adrian Schmutzler 3a4b751110 ath79: enable UART in SoC DTSI files
The uart node is enabled on all devices except one (GL-USB150 *).
Thus, let's not have a few hundred nodes to enable it, but do not
disable it in the first place.

Where the majority of devices is using it, also move the serial0
alias to the DTSI.

*) Since GL-USB150 even defines serial0 alias, the missing uart
   is probably just a mistake. Anyway, disable it for now so this
   patch stays cosmetic.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2021-02-24 02:53:53 +01:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_power_amber;
led-failsafe = &led_power_amber;
led-running = &led_power_green;
led-upgrade = &led_power_amber;
label-mac-device = &eth0;
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
};
ath9k-keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
rfkill {
label = "rfkill";
linux,code = <KEY_RFKILL>;
gpios = <&ath9k 9 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds: leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins>;
led_power_green: power_green {
label = "green:power";
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
led_power_amber: power_amber {
label = "amber:power";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
wan_green {
label = "green:wan";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
wan_amber {
label = "amber:wan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wlan2g_green {
label = "green:wlan2g";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wps_green {
label = "green:wps";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wlan5g_blue {
label = "blue:wlan5g";
gpios = <&ath9k 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
};
partition@50000 {
label = "caldata_backup";
reg = <0x50000 0x10000>;
read-only;
};
partition@60000 {
label = "config";
reg = <0x60000 0x10000>;
};
partition@70000 {
label = "traffic_meter";
reg = <0x70000 0x10000>;
};
partition@80000 {
label = "pot";
reg = <0x80000 0x10000>;
};
partition@90000 {
label = "reserved";
reg = <0x90000 0x160000>;
};
caldata: partition@1f0000 {
label = "caldata";
reg = <0x1f0000 0x10000>;
read-only;
};
};
};
flash@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x400000>;
};
partition@400000 {
label = "ubi";
reg = <0x400000 0x7c00000>;
};
};
};
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = <
0x04 0x00000080 /* PORT0 PAD MODE CTRL */
0x10 0x81000080 /* POWER_ON_STRAP */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x54 0xcb37cb37 /* LED_CTRL1 */
0x58 0x00000000 /* LED_CTRL2 */
0x5c 0x00f3cf00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x00000200 /* PORT6_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001919>;
mtd-mac-address = <&caldata 0x0>;
phy-mode = "sgmii";
phy-handle = <&phy0>;
};
&wmac {
status = "okay";
mtd-mac-address = <&caldata 0x0>;
qca,no-eeprom;
};
&pcie {
status = "okay";
ath9k: wifi@0,0 {
/* chip is AR9580, override bogus PCI ID 168c:abcd */
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
mtd-mac-address = <&caldata 0xc>;
qca,no-eeprom;
qca,gpio-mask=<0xf6ff>; /* unmask pin 9 for RFKILL button */
#gpio-cells = <2>;
gpio-controller;
};
};
&usb_phy0 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port0: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};