863e79f8d5
The following patches were dropped because they are already applied upstream: 0012-pinctrl-lantiq-fix-up-pinmux.patch 0013-MTD-lantiq-xway-fix-invalid-operator.patch 0014-MTD-lantiq-xway-the-latched-command-should-be-persis.patch 0015-MTD-lantiq-xway-remove-endless-loop.patch 0016-MTD-lantiq-xway-add-missing-write_buf-and-read_buf-t.patch 0017-MTD-xway-fix-nand-locking.patch 0044-pinctrl-lantiq-introduce-new-dedicated-devicetree-bi.patch 0045-pinctrl-lantiq-Fix-GPIO-Setup-of-GPIO-Port3.patch 0046-pinctrl-lantiq-2-pins-have-the-wrong-mux-list.patch 0047-irq-fixes.patch 0047-mtd-plat-nand-pass-of-node.patch 0060-usb-dwc2-Add-support-for-Lantiq-ARX-and-XRX-SoCs.patch 0120-MIPS-lantiq-add-support-for-device-tree-file-from-bo.patch 0121-MIPS-lantiq-make-it-possible-to-build-in-no-device-t.patch 122-MIPS-store-the-appended-dtb-address-in-a-variable.patch The PHY driver was reduced to the code adding the LED configuration, the rest is already upstream: 0023-NET-PHY-adds-driver-for-lantiq-PHY11G.patch The SPI driver was replaced with the version pending for upstream inclusion: New driver: 0090-spi-add-transfer_status-callback.patch 0091-spi-lantiq-ssc-add-support-for-Lantiq-SSC-SPI-controller.patch Old driver: 0100-spi-add-support-for-Lantiq-SPI-controller.patch Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
88 lines
2.3 KiB
Diff
88 lines
2.3 KiB
Diff
From: Felix Fietkau <nbd@nbd.name>
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Date: Thu, 19 Jan 2017 12:14:44 +0100
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Subject: [PATCH] MIPS: Lantiq: Fix cascaded IRQ setup
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With the IRQ stack changes integrated, the XRX200 devices started
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emitting a constant stream of kernel messages like this:
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[ 565.415310] Spurious IRQ: CAUSE=0x1100c300
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This appears to be caused by IP0 firing for some reason without being
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handled. Fix this by setting up IP2-6 as a proper chained IRQ handler and
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calling do_IRQ for all MIPS CPU interrupts.
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Cc: john@phrozen.org
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Cc: stable@vger.kernel.org
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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---
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--- a/arch/mips/lantiq/irq.c
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+++ b/arch/mips/lantiq/irq.c
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@@ -271,6 +271,11 @@ static void ltq_hw5_irqdispatch(void)
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DEFINE_HWx_IRQDISPATCH(5)
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#endif
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+static void ltq_hw_irq_handler(struct irq_desc *desc)
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+{
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+ ltq_hw_irqdispatch(irq_desc_get_irq(desc) - 2);
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+}
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+
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#ifdef CONFIG_MIPS_MT_SMP
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void __init arch_init_ipiirq(int irq, struct irqaction *action)
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{
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@@ -315,23 +320,19 @@ static struct irqaction irq_call = {
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asmlinkage void plat_irq_dispatch(void)
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{
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unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
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- unsigned int i;
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+ int irq;
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- if ((MIPS_CPU_TIMER_IRQ == 7) && (pending & CAUSEF_IP7)) {
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- do_IRQ(MIPS_CPU_TIMER_IRQ);
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- goto out;
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- } else {
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- for (i = 0; i < MAX_IM; i++) {
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- if (pending & (CAUSEF_IP2 << i)) {
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- ltq_hw_irqdispatch(i);
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- goto out;
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- }
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- }
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+ if (!pending) {
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+ spurious_interrupt();
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+ return;
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}
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- pr_alert("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
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-out:
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- return;
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+ pending >>= CAUSEB_IP;
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+ while (pending) {
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+ irq = fls(pending) - 1;
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+ do_IRQ(MIPS_CPU_IRQ_BASE + irq);
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+ pending &= ~BIT(irq);
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+ }
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}
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static int icu_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
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@@ -356,11 +357,6 @@ static const struct irq_domain_ops irq_d
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.map = icu_map,
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};
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-static struct irqaction cascade = {
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- .handler = no_action,
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- .name = "cascade",
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-};
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-
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int __init icu_of_init(struct device_node *node, struct device_node *parent)
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{
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struct device_node *eiu_node;
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@@ -392,7 +388,7 @@ int __init icu_of_init(struct device_nod
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mips_cpu_irq_init();
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for (i = 0; i < MAX_IM; i++)
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- setup_irq(i + 2, &cascade);
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+ irq_set_chained_handler(i + 2, ltq_hw_irq_handler);
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if (cpu_has_vint) {
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pr_info("Setting up vectored interrupts\n");
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