tn3399_openwrt/target/linux/ipq806x/files-5.15/arch/arm/boot/dts/qcom-ipq8062-wg2600hp3.dts
Christian Marangi 88bf652525
ipq806x: 5.15: replace dtsi patches with upstream version
Reorganize dtsi patches with upstream version and drop dtsi in 5.15
files.
Also add an additional upstream patch for hwspinlock support.
Refresh all the dts with needed changes.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2022-10-11 21:28:41 +02:00

489 lines
8.6 KiB
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq8062-smb208.dtsi"
#include <dt-bindings/input/input.h>
/delete-node/ &nand_pins;
/ {
model = "NEC Platforms Aterm WG2600HP3";
compatible = "nec,wg2600hp3", "qcom,ipq8062", "qcom,ipq8064";
memory {
device_type = "memory";
reg = <0x42000000 0x1e000000>;
};
aliases {
label-mac-device = &gmac2;
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_red;
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&buttons_pins>;
pinctrl-names = "default";
reset {
label = "reset";
gpios = <&qcom_pinmux 24 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
wakeup-source;
};
wps {
label = "wps";
gpios = <&qcom_pinmux 22 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
wakeup-source;
};
mode0 {
label = "mode0";
gpios = <&qcom_pinmux 40 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
wakeup-source;
};
mode1 {
label = "mode1";
gpios = <&qcom_pinmux 41 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
wakeup-source;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&leds_pins>;
pinctrl-names = "default";
led_power_green: power_green {
label = "green:power";
gpios = <&qcom_pinmux 14 GPIO_ACTIVE_HIGH>;
};
led_power_red: power_red {
label = "red:power";
gpios = <&qcom_pinmux 35 GPIO_ACTIVE_HIGH>;
};
active_green {
label = "green:active";
gpios = <&qcom_pinmux 42 GPIO_ACTIVE_HIGH>;
};
active_red {
label = "red:active";
gpios = <&qcom_pinmux 38 GPIO_ACTIVE_HIGH>;
};
wlan2g_green {
label = "green:wlan2g";
gpios = <&qcom_pinmux 55 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1tpt";
};
wlan2g_red {
label = "red:wlan2g";
gpios = <&qcom_pinmux 56 GPIO_ACTIVE_HIGH>;
};
wlan5g_green {
label = "green:wlan5g";
gpios = <&qcom_pinmux 57 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
wlan5g_red {
label = "red:wlan5g";
gpios = <&qcom_pinmux 58 GPIO_ACTIVE_HIGH>;
};
tv_green {
label = "green:tv";
gpios = <&qcom_pinmux 46 GPIO_ACTIVE_HIGH>;
};
tv_red {
label = "red:tv";
gpios = <&qcom_pinmux 36 GPIO_ACTIVE_HIGH>;
};
converter_green {
label = "green:converter";
gpios = <&qcom_pinmux 43 GPIO_ACTIVE_HIGH>;
};
converter_red {
label = "red:converter";
gpios = <&qcom_pinmux 15 GPIO_ACTIVE_HIGH>;
};
};
};
/* nand_pins are used for leds_pins, empty the node
* from ipq8064.dtsi
*/
&nand_pins {
/delete-property/ disable;
/delete-property/ pullups;
/delete-property/ hold;
};
&qcom_pinmux {
pinctrl-0 = <&akro_pins>;
pinctrl-names = "default";
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
function = "gsbi5";
bias-pull-down;
};
data {
pins = "gpio18", "gpio19";
drive-strength = <10>;
};
cs {
pins = "gpio20";
drive-strength = <10>;
};
clk {
pins = "gpio21";
drive-strength = <12>;
};
};
buttons_pins: buttons_pins {
mux {
pins = "gpio22", "gpio24", "gpio40",
"gpio41";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
leds_pins: leds_pins {
mux {
pins = "gpio14", "gpio15", "gpio35",
"gpio36", "gpio38", "gpio42",
"gpio43", "gpio46", "gpio55",
"gpio56", "gpio57", "gpio58";
function = "gpio";
bias-pull-down;
};
akro2 {
pins = "gpio15", "gpio35", "gpio38",
"gpio42", "gpio43", "gpio46",
"gpio55", "gpio56", "gpio57",
"gpio58";
drive-strength = <2>;
};
akro4 {
pins = "gpio14", "gpio36";
drive-strength = <4>;
};
};
/*
* Stock firmware has the following settings, so let's do the same.
* I don't sure why these are required.
*/
akro_pins: akro_pinmux {
akro {
pins = "gpio17", "gpio26", "gpio47";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
reset {
pins = "gpio45";
function = "gpio";
drive-strength = <2>;
bias-disable;
output-low;
};
gmac0_rgmii {
pins = "gpio25";
function = "gpio";
drive-strength = <8>;
bias-disable;
};
};
};
&gsbi5 {
status = "okay";
qcom,mode = <GSBI_PROT_SPI>;
spi@1a280000 {
status = "okay";
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
m25p,fast-read;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x0000000 0x0020000>;
read-only;
};
partition@20000 {
label = "MIBIB";
reg = <0x0020000 0x0020000>;
read-only;
};
partition@40000 {
label = "SBL2";
reg = <0x0040000 0x0040000>;
read-only;
};
partition@80000 {
label = "SBL3";
reg = <0x0080000 0x0080000>;
read-only;
};
partition@100000 {
label = "DDRCONFIG";
reg = <0x0100000 0x0010000>;
read-only;
};
partition@110000 {
label = "SSD";
reg = <0x0110000 0x0010000>;
read-only;
};
partition@120000 {
label = "TZ";
reg = <0x0120000 0x0080000>;
read-only;
};
partition@1a0000 {
label = "RPM";
reg = <0x01a0000 0x0080000>;
read-only;
};
partition@220000 {
label = "APPSBL";
reg = <0x0220000 0x0080000>;
read-only;
};
partition@2a0000 {
label = "APPSBLENV";
reg = <0x02a0000 0x0010000>;
read-only;
};
factory: partition@2b0000 {
label = "PRODUCTDATA";
reg = <0x02b0000 0x0030000>;
read-only;
};
partition@2e0000 {
label = "ART";
reg = <0x02e0000 0x0040000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
precal_ART_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
precal_ART_5000: precal@5000 {
reg = <0x5000 0x2f20>;
};
};
partition@320000 {
label = "TP";
reg = <0x0320000 0x0040000>;
read-only;
};
partition@360000 {
label = "TINY";
reg = <0x0360000 0x0500000>;
read-only;
};
partition@860000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x0860000 0x17a0000>;
};
};
};
};
};
&adm_dma {
status = "okay";
};
&pcie0 {
status = "okay";
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
nvmem-cells = <&macaddr_PRODUCTDATA_12>, <&precal_ART_1000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
};
&pcie1 {
status = "okay";
force_gen1 = <1>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
wifi@1,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
ieee80211-freq-limit = <2400000 2483000>;
qcom,ath10k-calibration-variant = "NEC-Platforms-WG2600HP3";
nvmem-cells = <&macaddr_PRODUCTDATA_c>, <&precal_ART_5000>;
nvmem-cell-names = "mac-address", "pre-calibration";
};
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x80080080 /* PAD0_MODE */
0x0c 0x06000000 /* PAD6_MODE */
0x10 0x002613a0 /* PWS_REG */
0x50 0xcc36cc36 /* LED_CTRL0 */
0x54 0xca36ca36 /* LED_CTRL1 */
0x58 0xc936c936 /* LED_CTRL2 */
0x5c 0x03ffff00 /* LED_CTRL3 */
0x7c 0x0000004e /* PORT0_STATUS */
0x94 0x0000004e /* PORT6_STATUS */
0xe0 0xc74164de /* SGMII_CTRL */
0xe4 0x0006a545 /* MAC_PWR_SEL */
>;
};
};
&gmac1 {
status = "okay";
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
phy-mode = "rgmii";
qcom,id = <1>;
mdiobus = <&mdio0>;
nvmem-cells = <&macaddr_factory_0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gmac2 {
status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
mdiobus = <&mdio0>;
nvmem-cells = <&macaddr_factory_6>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_factory_6: macaddr@6 {
reg = <0x6 0x6>;
};
macaddr_PRODUCTDATA_c: macaddr@c {
reg = <0xc 0x6>;
};
macaddr_PRODUCTDATA_12: macaddr@12 {
reg = <0x12 0x6>;
};
};