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tn3399_openwrt/target/linux/malta
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Hauke Mehrtens 38666e8ae4 malta: Deactivate MIPS O32 and N32 support 
OpenWrt is completely compiled from sources using a 64 bit compiler, we
do not need support for the old 32 bit MIPS interface on 64 Bit CPUs,
deactivate it.

Fixes: 46af22de16 ("kernel: Remove CONFIG_COMPAT")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2019-05-14 21:50:42 +02:00
..
base-files/etc image / basefiles: make console password configurable 2016-04-18 21:53:07 +02:00
be malta: upgrade to kernel 4.9 2017-10-15 14:22:01 +02:00
be64 malta: Deactivate MIPS O32 and N32 support 2019-05-14 21:50:42 +02:00
image treewide: do not use IMG_PREFIX in Image/Prepare 2017-10-26 12:26:25 +02:00
le malta: upgrade to kernel 4.9 2017-10-15 14:22:01 +02:00
le64 malta: Deactivate MIPS O32 and N32 support 2019-05-14 21:50:42 +02:00
config-4.14 malta: Refresh kernel 4.14 configuration 2019-01-13 16:31:38 +01:00
config-4.19 malta: Add support for kernel 4.19 2019-01-13 16:31:40 +01:00
Makefile treewide: use wpad-basic for not small flash targets 2018-10-16 15:07:41 +01:00
README malta: fix image prefix names 2018-01-09 10:26:16 +01:00

README 

This Malta target is intended to be used with the Qemu emulator. It can be used
to prototype an OpenWrt firmware for MIPS processors. One could also use it to
troubleshoot MIPS applications without access to real hardware.

To use the images built by OpenWrt with qemu, use the following commands:

For the 32 bit little-endian image:
qemu-system-mipsel -kernel bin/targets/malta/le/openwrt-malta-le-vmlinux-initramfs.elf -nographic -m 256

For the 32 bit big-endian image:
qemu-system-mips -kernel bin/targets/malta/be/openwrt-malta-be-vmlinux-initramfs.elf -nographic -m 256

For the 64 bit little-endian image:
qemu-system-mips64el -kernel bin/targets/malta/le64/openwrt-malta-le64-vmlinux-initramfs.elf -nographic -m 256

For the 64 bit big-endian image:
qemu-system-mips64 -kernel bin/targets/malta/be64/openwrt-malta-be64-vmlinux-initramfs.elf -nographic -m 256

and enjoy the system bootin.