02629d8f87
Targets were build tested and patches are refreshed. Signed-off-by: Luka Perkov <luka@openwrt.org> SVN-Revision: 42463
92 lines
2.1 KiB
Diff
92 lines
2.1 KiB
Diff
From 258a3ea23ec048603debe1621c681b0cc733f236 Mon Sep 17 00:00:00 2001
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From: Stephen Boyd <sboyd@codeaurora.org>
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Date: Wed, 18 Jun 2014 16:04:37 -0700
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Subject: [PATCH 175/182] ARM: dts: ipq8064: Add necessary DT data for Krait
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cpufreq
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Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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---
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arch/arm/boot/dts/qcom-ipq8064.dtsi | 45 +++++++++++++++++++++++++++++++++++
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1 file changed, 45 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
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@@ -23,6 +23,22 @@
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next-level-cache = <&L2>;
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qcom,acc = <&acc0>;
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qcom,saw = <&saw0>;
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+ clocks = <&kraitcc 0>;
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+ clock-names = "cpu";
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+ operating-points = <
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+ /* kHz ignored */
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+ 1400000 1000000
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+ 1200000 1000000
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+ 1000000 1000000
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+ 800000 1000000
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+ 600000 1000000
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+ 384000 1000000
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+ >;
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+ clock-latency = <100000>;
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+
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+ cooling-min-state = <0>;
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+ cooling-max-state = <10>;
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+ #cooling-cells = <2>;
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};
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cpu@1 {
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@@ -33,6 +49,22 @@
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next-level-cache = <&L2>;
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qcom,acc = <&acc1>;
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qcom,saw = <&saw1>;
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+ clocks = <&kraitcc 1>;
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+ clock-names = "cpu";
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+ operating-points = <
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+ /* kHz ignored */
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+ 1400000 1000000
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+ 1200000 1000000
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+ 1000000 1000000
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+ 800000 1000000
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+ 600000 1000000
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+ 384000 1000000
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+ >;
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+ clock-latency = <100000>;
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+
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+ cooling-min-state = <0>;
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+ cooling-max-state = <10>;
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+ #cooling-cells = <2>;
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};
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L2: l2-cache {
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@@ -46,6 +78,11 @@
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interrupts = <1 10 0x304>;
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};
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+ kraitcc: clock-controller {
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+ compatible = "qcom,krait-cc-v1";
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+ #clock-cells = <1>;
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+ };
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+
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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@@ -102,11 +139,19 @@
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acc0: clock-controller@2088000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
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+ clock-output-names = "acpu0_aux";
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};
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acc1: clock-controller@2098000 {
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compatible = "qcom,kpss-acc-v1";
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reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
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+ clock-output-names = "acpu1_aux";
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+ };
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+
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+ l2cc: clock-controller@2011000 {
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+ compatible = "qcom,kpss-gcc";
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+ reg = <0x2011000 0x1000>;
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+ clock-output-names = "acpu_l2_aux";
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};
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saw0: regulator@2089000 {
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