0494278073
The ar71xx GPIO driver only uses 0x24 registers, all following GPIO registers are using to control pinmux functions, which are not handles by the GPIO driver but the generic Linux pinctrl driver. For some SoC conflicting address ranges were defined for these (AR7240 & AR9330). Resolve these cases and align the address space of the GPIO controller between all SoCs, as the used address space of the driver is identical for all these. Signed-off-by: David Bauer <mail@david-bauer.net>
196 lines
3.5 KiB
Plaintext
196 lines
3.5 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
|
|
|
|
#include "ath79.dtsi"
|
|
|
|
/ {
|
|
compatible = "qca,ar9132";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200";
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "mips,mips24Kc";
|
|
clocks = <&pll ATH79_CLK_CPU>;
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
cpuintc: interrupt-controller {
|
|
compatible = "qca,ar9132-cpu-intc", "qca,ar7100-cpu-intc";
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
|
|
qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>;
|
|
qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
|
|
<&ddr_ctrl 0>, <&ddr_ctrl 1>;
|
|
};
|
|
|
|
ahb {
|
|
compatible = "simple-bus";
|
|
ranges;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
interrupt-parent = <&cpuintc>;
|
|
|
|
apb {
|
|
compatible = "simple-bus";
|
|
ranges;
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
interrupt-parent = <&miscintc>;
|
|
|
|
ddr_ctrl: memory-controller@18000000 {
|
|
compatible = "qca,ar9132-ddr-controller",
|
|
"qca,ar7240-ddr-controller";
|
|
reg = <0x18000000 0x100>;
|
|
|
|
#qca,ddr-wb-channel-cells = <1>;
|
|
};
|
|
|
|
uart: uart@18020000 {
|
|
compatible = "ns8250";
|
|
reg = <0x18020000 0x20>;
|
|
interrupts = <3>;
|
|
|
|
clocks = <&pll ATH79_CLK_AHB>;
|
|
clock-names = "uart";
|
|
|
|
reg-io-width = <4>;
|
|
reg-shift = <2>;
|
|
no-loopback-test;
|
|
};
|
|
|
|
gpio: gpio@18040000 {
|
|
compatible = "qca,ar9132-gpio",
|
|
"qca,ar7100-gpio";
|
|
reg = <0x18040000 0x28>;
|
|
interrupts = <2>;
|
|
|
|
ngpios = <22>;
|
|
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
pll: pll-controller@18050000 {
|
|
compatible = "qca,ar9132-pll",
|
|
"qca,ar9130-pll", "syscon";
|
|
reg = <0x18050000 0x20>;
|
|
|
|
clock-names = "ref";
|
|
/* The board must provides the ref clock */
|
|
|
|
#clock-cells = <1>;
|
|
clock-output-names = "cpu", "ddr", "ahb";
|
|
};
|
|
|
|
wdt: wdt@18060008 {
|
|
compatible = "qca,ar7130-wdt";
|
|
reg = <0x18060008 0x8>;
|
|
|
|
interrupts = <4>;
|
|
|
|
clocks = <&pll ATH79_CLK_AHB>;
|
|
clock-names = "wdt";
|
|
};
|
|
|
|
miscintc: interrupt-controller@18060010 {
|
|
compatible = "qca,ar9132-misc-intc",
|
|
"qca,ar7100-misc-intc";
|
|
reg = <0x18060010 0x8>;
|
|
|
|
interrupt-parent = <&cpuintc>;
|
|
interrupts = <6>;
|
|
|
|
interrupt-controller;
|
|
#interrupt-cells = <1>;
|
|
};
|
|
|
|
rst: reset-controller@1806001c {
|
|
compatible = "qca,ar9132-reset",
|
|
"qca,ar7100-reset";
|
|
reg = <0x1806001c 0x4>;
|
|
|
|
#reset-cells = <1>;
|
|
};
|
|
};
|
|
|
|
usb: usb@1b000100 {
|
|
compatible = "qca,ar7100-ehci", "generic-ehci";
|
|
reg = <0x1b000100 0x100>;
|
|
|
|
interrupts = <3>;
|
|
resets = <&rst 5>;
|
|
|
|
has-transaction-translator;
|
|
|
|
phy-names = "usb";
|
|
phys = <&usb_phy>;
|
|
|
|
status = "disabled";
|
|
};
|
|
|
|
spi: spi@1f000000 {
|
|
compatible = "qca,ar9132-spi", "qca,ar7100-spi";
|
|
reg = <0x1f000000 0x10>;
|
|
|
|
clocks = <&pll ATH79_CLK_AHB>;
|
|
clock-names = "ahb";
|
|
|
|
status = "disabled";
|
|
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
};
|
|
|
|
wmac: wmac@180c0000 {
|
|
compatible = "qca,ar9130-wmac";
|
|
reg = <0x180c0000 0x230000>;
|
|
|
|
interrupts = <2>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usb_phy: usb-phy {
|
|
compatible = "qca,ar7200-usb-phy";
|
|
|
|
reset-names = "usb-phy", "usb-suspend-override";
|
|
resets = <&rst 4>, <&rst 3>;
|
|
|
|
#phy-cells = <0>;
|
|
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
compatible = "qca,ar9130-eth", "syscon";
|
|
reg = <0x19000000 0x200
|
|
0x18070000 0x4>;
|
|
pll-data = <0x1a000000 0x13000a44 0x00441099>;
|
|
pll-reg = <0x4 0x14 20>;
|
|
pll-handle = <&pll>;
|
|
resets = <&rst 9>;
|
|
reset-names = "mac";
|
|
qca,mac-idx = <0>;
|
|
};
|