d5bf46bbe8
OpenWRT's developer guide prefers having actual patches so they an be sent upstream more easily. However, in this case, Adding proper fields also allows for `git am` to properly function. Some of these patches are quite old, and lack much traceable history. This commit tries to rectify that, by digging in the history to find where and how it was first added. It is by no means perfect and also shows some patches that should have been long gone. Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
169 lines
5.1 KiB
Diff
169 lines
5.1 KiB
Diff
From f32085fc0b87049491b07e198d924d738a1a2834 Mon Sep 17 00:00:00 2001
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From: Daniel Danzberger <daniel@dd-wrt.com>
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Date: Wed, 3 Aug 2022 17:31:03 +0200
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Subject: [PATCH] mtd: spinand: Add support for Etron EM73D044VCx
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Airoha is a new ARM platform based on Cortex-A53 which has recently been
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merged into linux-next.
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Due to BootROM limitations on this platform, the Cortex-A53 can't run in
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Aarch64 mode and code must be compiled for 32-Bit ARM.
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This support is based mostly on those linux-next commits backported
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for kernel 5.15.
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Patches:
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1 - platform support = linux-next
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2 - clock driver = linux-next
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3 - gpio driver = linux-next
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4 - linux,usable-memory-range dts support = linux-next
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5 - mtd spinand driver
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6 - spi driver
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7 - pci driver (kconfig only, uses mediatek PCI) = linux-next
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Still missing:
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- Ethernet driver
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- Sysupgrade support
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A.t.m there exists one subtarget EN7523 with only one evaluation
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board.
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The initramfs can be run with the following commands from u-boot:
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-
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u-boot> setenv bootfile \
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openwrt-airoha-airoha_en7523-evb-initramfs-kernel.bin
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u-boot> tftpboot
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u-boot> bootm 0x81800000
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-
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Submitted-by: Daniel Danzberger <daniel@dd-wrt.com>
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--- a/drivers/mtd/nand/spi/Makefile
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+++ b/drivers/mtd/nand/spi/Makefile
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@@ -1,3 +1,3 @@
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# SPDX-License-Identifier: GPL-2.0
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-spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
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+spinand-objs := core.o esmt.o etron.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
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obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
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--- a/drivers/mtd/nand/spi/core.c
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+++ b/drivers/mtd/nand/spi/core.c
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@@ -898,6 +898,7 @@ static const struct nand_ops spinand_ops
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static const struct spinand_manufacturer *spinand_manufacturers[] = {
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&esmt_c8_spinand_manufacturer,
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&gigadevice_spinand_manufacturer,
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+ &etron_spinand_manufacturer,
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¯onix_spinand_manufacturer,
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µn_spinand_manufacturer,
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¶gon_spinand_manufacturer,
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--- /dev/null
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+++ b/drivers/mtd/nand/spi/etron.c
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@@ -0,0 +1,98 @@
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+// SPDX-License-Identifier: GPL-2.0
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+
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+#include <linux/device.h>
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+#include <linux/kernel.h>
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+#include <linux/mtd/spinand.h>
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+
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+#define SPINAND_MFR_ETRON 0xd5
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+
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+
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+static SPINAND_OP_VARIANTS(read_cache_variants,
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+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(write_cache_variants,
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+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
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+
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+static SPINAND_OP_VARIANTS(update_cache_variants,
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+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
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+
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+static int etron_ooblayout_ecc(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *oobregion)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ oobregion->offset = 72;
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+ oobregion->length = 56;
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+
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+ return 0;
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+}
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+
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+static int etron_ooblayout_free(struct mtd_info *mtd, int section,
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+ struct mtd_oob_region *oobregion)
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+{
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+ if (section)
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+ return -ERANGE;
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+
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+ oobregion->offset = 1;
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+ oobregion->length = 71;
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+
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+ return 0;
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+}
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+
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+static int etron_ecc_get_status(struct spinand_device *spinand, u8 status)
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+{
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+ switch (status & STATUS_ECC_MASK) {
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+ case STATUS_ECC_NO_BITFLIPS:
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+ return 0;
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+
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+ case STATUS_ECC_HAS_BITFLIPS:
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+ /* Between 1-7 bitflips were corrected */
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+ return 7;
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+
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+ case STATUS_ECC_MASK:
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+ /* Maximum bitflips were corrected */
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+ return 8;
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+
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+ case STATUS_ECC_UNCOR_ERROR:
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+ return -EBADMSG;
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+ }
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+
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+ return -EINVAL;
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+}
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+
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+static const struct mtd_ooblayout_ops etron_ooblayout = {
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+ .ecc = etron_ooblayout_ecc,
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+ .free = etron_ooblayout_free,
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+};
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+
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+static const struct spinand_info etron_spinand_table[] = {
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+ SPINAND_INFO("EM73D044VCx",
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+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x1f),
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+ // bpc, pagesize, oobsize, pagesperblock, bperlun, maxbadplun, ppl, lpt, #t
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+ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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+ NAND_ECCREQ(8, 512),
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+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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+ &write_cache_variants,
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+ &update_cache_variants),
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+ SPINAND_HAS_QE_BIT,
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+ SPINAND_ECCINFO(&etron_ooblayout, etron_ecc_get_status)),
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+};
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+
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+static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = {
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+};
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+
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+const struct spinand_manufacturer etron_spinand_manufacturer = {
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+ .id = SPINAND_MFR_ETRON,
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+ .name = "Etron",
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+ .chips = etron_spinand_table,
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+ .nchips = ARRAY_SIZE(etron_spinand_table),
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+ .ops = &etron_spinand_manuf_ops,
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+};
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--- a/include/linux/mtd/spinand.h
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+++ b/include/linux/mtd/spinand.h
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@@ -261,6 +261,7 @@ struct spinand_manufacturer {
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/* SPI NAND manufacturers */
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extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
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+extern const struct spinand_manufacturer etron_spinand_manufacturer;
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extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
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extern const struct spinand_manufacturer macronix_spinand_manufacturer;
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extern const struct spinand_manufacturer micron_spinand_manufacturer;
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