tn3399_openwrt/target/linux/generic/backport-5.15/747-v5.16-04-dt-bindings-net-dsa-qca8k-Document-support-for-CPU-p.patch
Ansuel Smith 9a038e7fd1 generic: 5.15: copy config and patch from 5.10
Copy config and patches from kernel 5.10 to kernel 5.15

Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
2022-03-27 00:07:34 +00:00

30 lines
1.3 KiB
Diff

From 731d613338ec6de482053ffa3f71be2325b0f8eb Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Thu, 14 Oct 2021 00:39:09 +0200
Subject: dt-bindings: net: dsa: qca8k: Document support for CPU port 6
The switch now support CPU port to be set 6 instead of be hardcoded to
0. Document support for it and describe logic selection.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
Documentation/devicetree/bindings/net/dsa/qca8k.txt | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/Documentation/devicetree/bindings/net/dsa/qca8k.txt
+++ b/Documentation/devicetree/bindings/net/dsa/qca8k.txt
@@ -29,7 +29,11 @@ the mdio MASTER is used as communication
Don't use mixed external and internal mdio-bus configurations, as this is
not supported by the hardware.
-The CPU port of this switch is always port 0.
+This switch support 2 CPU port. Normally and advised configuration is with
+CPU port set to port 0. It is also possible to set the CPU port to port 6
+if the device requires it. The driver will configure the switch to the defined
+port. With both CPU port declared the first CPU port is selected as primary
+and the secondary CPU ignored.
A CPU port node has the following optional node: