cf110404e3
Properly format and refresh patch
Fixes: d03977faf4 ("kernel: backport support for Sierra Wireless EM919x modems")
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
81 lines
3.2 KiB
Diff
81 lines
3.2 KiB
Diff
From 789d3eeb2367f92193a0882f7cdab03f0f9d6930 Mon Sep 17 00:00:00 2001
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From: Thomas Perrot <thomas.perrot@bootlin.com>
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Date: Thu, 16 Dec 2021 13:42:27 +0530
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Subject: [PATCH] bus: mhi: pci_generic: Introduce Sierra EM919X support
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Add support for EM919X modems, this modem series is based on SDX55
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qcom chip.
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It is mandatory to use the same ring for control+data and diag events.
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Link: https://lore.kernel.org/r/20211123081541.648426-1-thomas.perrot@bootlin.com
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Tested-by: Aleksander Morgado <aleksander@aleksander.es>
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Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
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Signed-off-by: Thomas Perrot <thomas.perrot@bootlin.com>
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Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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Link: https://lore.kernel.org/r/20211216081227.237749-11-manivannan.sadhasivam@linaro.org
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/bus/mhi/pci_generic.c | 43 +++++++++++++++++++++++++++++++++++
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1 file changed, 43 insertions(+)
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--- a/drivers/bus/mhi/pci_generic.c
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+++ b/drivers/bus/mhi/pci_generic.c
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@@ -406,6 +406,46 @@ static const struct mhi_pci_dev_info mhi
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.mru_default = 32768,
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};
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+static const struct mhi_channel_config mhi_sierra_em919x_channels[] = {
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+ MHI_CHANNEL_CONFIG_UL_SBL(2, "SAHARA", 32, 0),
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+ MHI_CHANNEL_CONFIG_DL_SBL(3, "SAHARA", 256, 0),
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+ MHI_CHANNEL_CONFIG_UL(4, "DIAG", 32, 0),
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+ MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 0),
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+ MHI_CHANNEL_CONFIG_UL(12, "MBIM", 128, 0),
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+ MHI_CHANNEL_CONFIG_DL(13, "MBIM", 128, 0),
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+ MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
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+ MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
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+ MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0),
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+ MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0),
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+ MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 512, 1),
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+ MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 512, 2),
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+};
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+
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+static struct mhi_event_config modem_sierra_em919x_mhi_events[] = {
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+ /* first ring is control+data and DIAG ring */
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+ MHI_EVENT_CONFIG_CTRL(0, 2048),
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+ /* Hardware channels request dedicated hardware event rings */
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+ MHI_EVENT_CONFIG_HW_DATA(1, 2048, 100),
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+ MHI_EVENT_CONFIG_HW_DATA(2, 2048, 101)
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+};
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+
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+static const struct mhi_controller_config modem_sierra_em919x_config = {
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+ .max_channels = 128,
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+ .timeout_ms = 24000,
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+ .num_channels = ARRAY_SIZE(mhi_sierra_em919x_channels),
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+ .ch_cfg = mhi_sierra_em919x_channels,
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+ .num_events = ARRAY_SIZE(modem_sierra_em919x_mhi_events),
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+ .event_cfg = modem_sierra_em919x_mhi_events,
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+};
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+
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+static const struct mhi_pci_dev_info mhi_sierra_em919x_info = {
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+ .name = "sierra-em919x",
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+ .config = &modem_sierra_em919x_config,
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+ .bar_num = MHI_PCI_DEFAULT_BAR_NUM,
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+ .dma_data_width = 32,
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+ .sideband_wake = false,
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+};
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+
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static const struct mhi_channel_config mhi_telit_fn980_hw_v1_channels[] = {
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MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0),
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MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0),
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@@ -480,6 +520,9 @@ static const struct mhi_pci_dev_info mhi
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};
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static const struct pci_device_id mhi_pci_id_table[] = {
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+ /* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */
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+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200),
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+ .driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info },
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/* Telit FN980 hardware revision v1 */
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{ PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x1C5D, 0x2000),
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.driver_data = (kernel_ulong_t) &mhi_telit_fn980_hw_v1_info },
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