13b8404b1e
This backports commits from master that fix AES ciphers when using the qce driver: - A couple of simple fixes for CTR and XTS modes used with AES: * 041-crypto-qce-fix-ctr-aes-qce-block-chunk-sizes.patch * 042-crypto-qce-fix-xts-aes-qce-key-sizes.patch - A fix for a bug that affected cases when there were more entries in the input sg list than necessary to actually encrypt, resulting in failure in gcm, where the authentication tag is present after the encryption data: * 043-crypto-qce-save-a-sg-table-slot-for-result-buf.patch - A fix to update the IV buffer passed to the driver from the kernel: * 044-crypto-qce-update-the-skcipher-IV.patch - A patch that reduces memory footprint and driver initialization by only initializing the fallback mechanism where it is actually used: * 046-crypto-qce-initialize-fallback-only-for-AES.patch - Three patches that make gcm and xts modes work with the qce driver, and improve performance with small blocks: * 047-crypto-qce-use-cryptlen-when-adding-extra-sgl.patch * 048-crypto-qce-use-AES-fallback-for-small-requests.patch * 049-crypto-qce-handle-AES-XTS-cases-that-qce-fails.patch - A patch that allows the hashes/ciphers to be built individually. * 051-crypto-qce-allow-building-only-hashes-ciphers.patch Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com> [renumbered patches, added patches from dropped commit, refreshed, 5.4] Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
54 lines
1.9 KiB
Diff
54 lines
1.9 KiB
Diff
From bbf2b1cf22dc98f3df33b6666df046dfb9564d91 Mon Sep 17 00:00:00 2001
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From: Eneas U de Queiroz <cotequeiroz@gmail.com>
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Date: Wed, 5 Feb 2020 13:42:25 -0300
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Subject: [PATCH] crypto: qce - handle AES-XTS cases that qce fails
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QCE hangs when presented with an AES-XTS request whose length is larger
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than QCE_SECTOR_SIZE (512-bytes), and is not a multiple of it. Let the
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fallback cipher handle them.
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Signed-off-by: Eneas U de Queiroz <cotequeiroz@gmail.com>
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--- a/drivers/crypto/qce/common.c
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+++ b/drivers/crypto/qce/common.c
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@@ -23,8 +23,6 @@
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#include "regs-v5.h"
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#include "sha.h"
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-#define QCE_SECTOR_SIZE 512
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-
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static inline u32 qce_read(struct qce_device *qce, u32 offset)
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{
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return readl(qce->base + offset);
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--- a/drivers/crypto/qce/common.h
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+++ b/drivers/crypto/qce/common.h
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@@ -20,6 +20,9 @@
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#include <crypto/hash.h>
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#include <crypto/internal/skcipher.h>
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+/* xts du size */
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+#define QCE_SECTOR_SIZE 512
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+
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/* key size in bytes */
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#define QCE_SHA_HMAC_KEY_SIZE 64
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#define QCE_MAX_CIPHER_KEY_SIZE AES_KEYSIZE_256
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--- a/drivers/crypto/qce/skcipher.c
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+++ b/drivers/crypto/qce/skcipher.c
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@@ -213,9 +213,14 @@ static int qce_skcipher_crypt(struct skc
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rctx->flags |= encrypt ? QCE_ENCRYPT : QCE_DECRYPT;
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keylen = IS_XTS(rctx->flags) ? ctx->enc_keylen >> 1 : ctx->enc_keylen;
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+ /* qce is hanging when AES-XTS request len > QCE_SECTOR_SIZE and
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+ * is not a multiple of it; pass such requests to the fallback
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+ */
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if (IS_AES(rctx->flags) &&
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- ((keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_256) ||
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- req->cryptlen <= aes_sw_max_len)) {
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+ (((keylen != AES_KEYSIZE_128 && keylen != AES_KEYSIZE_256) ||
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+ req->cryptlen <= aes_sw_max_len) ||
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+ (IS_XTS(rctx->flags) && req->cryptlen > QCE_SECTOR_SIZE &&
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+ req->cryptlen % QCE_SECTOR_SIZE))) {
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SKCIPHER_REQUEST_ON_STACK(subreq, ctx->fallback);
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skcipher_request_set_tfm(subreq, ctx->fallback);
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