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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-03-27 16:21:34 +08:00
commit 6d4d998ffc
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GPG Key ID: 6850B6345C862176
21 changed files with 621 additions and 30 deletions
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2
package/kernel/qca-ssdk/Makefile
View File

@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-ssdk
PKG_RELEASE:=5
PKG_RELEASE:=6
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-ssdk.git
PKG_SOURCE_PROTO:=git

98
package/kernel/qca-ssdk/patches/103-mdio-adapt-to-C22-and-C45-read-write-split.patch Normal file
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@ -0,0 +1,98 @@
From bdae481e89cbe551068a99028bb57119b59f5ff4 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 26 Mar 2024 12:19:49 +0100
Subject: [PATCH] mdio: adapt to C22 and C45 read/write split
Kernel 6.3 has introduced separate C45 read/write operations, and thus
split them out of the C22 operations completely so the old way of marking
C45 reads and writes via the register value does not work anymore.
This is causing SSDK to fail and find C45 only PHY-s such as Aquantia ones:
[ 22.187877] ssdk_phy_driver_init[371]:INFO:dev_id = 0, phy_adress = 8, phy_id = 0x0 phytype doesn't match
[ 22.209924] ssdk_phy_driver_init[371]:INFO:dev_id = 0, phy_adress = 0, phy_id = 0x0 phytype doesn't match
This in turn causes USXGMII MAC autoneg bit to not get set and then UNIPHY
autoneg will time out, causing the 10G ports not to work:
[ 37.292784] uniphy autoneg time out!
So, lets detect C45 reads and writes by the magic BIT(30) in the register
argument and if so call separate C45 mdiobus read/write functions.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
include/init/ssdk_plat.h | 7 +++++++
src/init/ssdk_plat.c | 30 ++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+)
--- a/include/init/ssdk_plat.h
+++ b/include/init/ssdk_plat.h
@@ -505,3 +505,10 @@ void ssdk_plat_exit(a_uint32_t dev_id);
#endif
/*qca808x_end*/
+
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
+#define MII_ADDR_C45 (1<<30)
+#define MII_DEVADDR_C45_SHIFT 16
+#define MII_DEVADDR_C45_MASK GENMASK(20, 16)
+#define MII_REGADDR_C45_MASK GENMASK(15, 0)
+#endif
--- a/src/init/ssdk_plat.c
+++ b/src/init/ssdk_plat.c
@@ -356,6 +356,18 @@ phy_addr_validation_check(a_uint32_t phy
return A_TRUE;
}
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
+static inline u16 mdiobus_c45_regad(u32 regnum)
+{
+ return FIELD_GET(MII_REGADDR_C45_MASK, regnum);
+}
+
+static inline u16 mdiobus_c45_devad(u32 regnum)
+{
+ return FIELD_GET(MII_DEVADDR_C45_MASK, regnum);
+}
+#endif
+
sw_error_t
qca_ar8327_phy_read(a_uint32_t dev_id, a_uint32_t phy_addr,
a_uint32_t reg, a_uint16_t* data)
@@ -371,9 +383,18 @@ qca_ar8327_phy_read(a_uint32_t dev_id, a
if (!bus)
return SW_NOT_SUPPORTED;
phy_addr = TO_PHY_ADDR(phy_addr);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
+ mutex_lock(&bus->mdio_lock);
+ if (reg & MII_ADDR_C45)
+ *data = __mdiobus_c45_read(bus, phy_addr, mdiobus_c45_devad(reg), mdiobus_c45_regad(reg));
+ else
+ *data = __mdiobus_read(bus, phy_addr, reg);
+ mutex_unlock(&bus->mdio_lock);
+#else
mutex_lock(&bus->mdio_lock);
*data = __mdiobus_read(bus, phy_addr, reg);
mutex_unlock(&bus->mdio_lock);
+#endif
return 0;
}
@@ -393,9 +414,18 @@ qca_ar8327_phy_write(a_uint32_t dev_id,
if (!bus)
return SW_NOT_SUPPORTED;
phy_addr = TO_PHY_ADDR(phy_addr);
+#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6,3,0))
+ mutex_lock(&bus->mdio_lock);
+ if (reg & MII_ADDR_C45)
+ __mdiobus_c45_write(bus, phy_addr, mdiobus_c45_devad(reg), mdiobus_c45_regad(reg), data);
+ else
+ __mdiobus_write(bus, phy_addr, reg, data);
+ mutex_unlock(&bus->mdio_lock);
+#else
mutex_lock(&bus->mdio_lock);
__mdiobus_write(bus, phy_addr, reg, data);
mutex_unlock(&bus->mdio_lock);
+#endif
return 0;
}

80
target/linux/generic/backport-6.1/880-v6.3-mfd-axp20x-Fix-order-of-pek-rise-and-fall-events.patch Normal file
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@ -0,0 +1,80 @@
From 8781ba7f45695af3ab8e8d1b55a31f527c9201a3 Mon Sep 17 00:00:00 2001
From: Aren Moynihan <aren@peacevolution.org>
Date: Thu, 8 Dec 2022 17:02:26 -0500
Subject: [PATCH] mfd: axp20x: Fix order of pek rise and fall events
The power button can get "stuck" if the rising edge and falling edge irq
are read in the same pass. This can often be triggered when resuming
from suspend if the power button is released before the kernel handles
the interrupt.
Swapping the order of the rise and fall events makes sure that the press
event is handled first, which prevents this situation.
Signed-off-by: Aren Moynihan <aren@peacevolution.org>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20221208220225.635414-1-aren@peacevolution.org
---
include/linux/mfd/axp20x.h | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
--- a/include/linux/mfd/axp20x.h
+++ b/include/linux/mfd/axp20x.h
@@ -432,8 +432,9 @@ enum {
AXP152_IRQ_PEK_SHORT,
AXP152_IRQ_PEK_LONG,
AXP152_IRQ_TIMER,
- AXP152_IRQ_PEK_RIS_EDGE,
+ /* out of bit order to make sure the press event is handled first */
AXP152_IRQ_PEK_FAL_EDGE,
+ AXP152_IRQ_PEK_RIS_EDGE,
AXP152_IRQ_GPIO3_INPUT,
AXP152_IRQ_GPIO2_INPUT,
AXP152_IRQ_GPIO1_INPUT,
@@ -472,8 +473,9 @@ enum {
AXP20X_IRQ_LOW_PWR_LVL1,
AXP20X_IRQ_LOW_PWR_LVL2,
AXP20X_IRQ_TIMER,
- AXP20X_IRQ_PEK_RIS_EDGE,
+ /* out of bit order to make sure the press event is handled first */
AXP20X_IRQ_PEK_FAL_EDGE,
+ AXP20X_IRQ_PEK_RIS_EDGE,
AXP20X_IRQ_GPIO3_INPUT,
AXP20X_IRQ_GPIO2_INPUT,
AXP20X_IRQ_GPIO1_INPUT,
@@ -502,8 +504,9 @@ enum axp22x_irqs {
AXP22X_IRQ_LOW_PWR_LVL1,
AXP22X_IRQ_LOW_PWR_LVL2,
AXP22X_IRQ_TIMER,
- AXP22X_IRQ_PEK_RIS_EDGE,
+ /* out of bit order to make sure the press event is handled first */
AXP22X_IRQ_PEK_FAL_EDGE,
+ AXP22X_IRQ_PEK_RIS_EDGE,
AXP22X_IRQ_GPIO1_INPUT,
AXP22X_IRQ_GPIO0_INPUT,
};
@@ -571,8 +574,9 @@ enum axp803_irqs {
AXP803_IRQ_LOW_PWR_LVL1,
AXP803_IRQ_LOW_PWR_LVL2,
AXP803_IRQ_TIMER,
- AXP803_IRQ_PEK_RIS_EDGE,
+ /* out of bit order to make sure the press event is handled first */
AXP803_IRQ_PEK_FAL_EDGE,
+ AXP803_IRQ_PEK_RIS_EDGE,
AXP803_IRQ_PEK_SHORT,
AXP803_IRQ_PEK_LONG,
AXP803_IRQ_PEK_OVER_OFF,
@@ -623,8 +627,9 @@ enum axp809_irqs {
AXP809_IRQ_LOW_PWR_LVL1,
AXP809_IRQ_LOW_PWR_LVL2,
AXP809_IRQ_TIMER,
- AXP809_IRQ_PEK_RIS_EDGE,
+ /* out of bit order to make sure the press event is handled first */
AXP809_IRQ_PEK_FAL_EDGE,
+ AXP809_IRQ_PEK_RIS_EDGE,
AXP809_IRQ_PEK_SHORT,
AXP809_IRQ_PEK_LONG,
AXP809_IRQ_PEK_OVER_OFF,

0
target/linux/generic/backport-6.1/880-v6.3-mfd-axp20x-Switch-to-the-sys-off-handler-API.patch → target/linux/generic/backport-6.1/881-v6.3-mfd-axp20x-Switch-to-the-sys-off-handler-API.patch
View File

28
target/linux/generic/backport-6.1/882-v6.3-mfd-axp20x-Fix-axp288-writable-ranges.patch Normal file
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@ -0,0 +1,28 @@
From 2405fbfb384ef39e9560d76d3f6e4c90519f90aa Mon Sep 17 00:00:00 2001
From: Hans de Goede <hdegoede@redhat.com>
Date: Wed, 29 Mar 2023 22:55:44 +0200
Subject: [PATCH] mfd: axp20x: Fix axp288 writable-ranges
Register AXP288_POWER_REASON is writable and needs to be written
to reset the reset- / power-on-reason bits.
Add it to the axp288 writable-ranges so that the extcon-axp288
driver can properly clear the reset- / power-on-reason bits.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Lee Jones <lee@kernel.org>
Link: https://lore.kernel.org/r/20230329205544.1051393-1-hdegoede@redhat.com
---
drivers/mfd/axp20x.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/mfd/axp20x.c
+++ b/drivers/mfd/axp20x.c
@@ -119,6 +119,7 @@ static const struct regmap_access_table
/* AXP288 ranges are shared with the AXP803, as they cover the same range */
static const struct regmap_range axp288_writeable_ranges[] = {
+ regmap_reg_range(AXP288_POWER_REASON, AXP288_POWER_REASON),
regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ6_STATE),
regmap_reg_range(AXP20X_DCDC_MODE, AXP288_FG_TUNE5),
};

16
target/linux/generic/backport-6.1/881-v6.4-mfd-axp20x-Add-support-for-AXP15060-PMIC.patch → target/linux/generic/backport-6.1/883-v6.4-mfd-axp20x-Add-support-for-AXP15060-PMIC.patch
View File

@ -57,7 +57,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
};
static const struct regmap_range axp152_writeable_ranges[] = {
@@ -168,6 +169,31 @@ static const struct regmap_access_table
@@ -169,6 +170,31 @@ static const struct regmap_access_table
.n_yes_ranges = ARRAY_SIZE(axp806_volatile_ranges),
};
@ -89,7 +89,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
static const struct resource axp152_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
@@ -236,6 +262,11 @@ static const struct resource axp809_pek_
@@ -237,6 +263,11 @@ static const struct resource axp809_pek_
DEFINE_RES_IRQ_NAMED(AXP809_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
};
@ -101,7 +101,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
static const struct regmap_config axp152_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -281,6 +312,15 @@ static const struct regmap_config axp806
@@ -282,6 +313,15 @@ static const struct regmap_config axp806
.cache_type = REGCACHE_RBTREE,
};
@ -117,7 +117,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
#define INIT_REGMAP_IRQ(_variant, _irq, _off, _mask) \
[_variant##_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
@@ -502,6 +542,23 @@ static const struct regmap_irq axp809_re
@@ -503,6 +543,23 @@ static const struct regmap_irq axp809_re
INIT_REGMAP_IRQ(AXP809, GPIO0_INPUT, 4, 0),
};
@ -141,7 +141,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
static const struct regmap_irq_chip axp152_regmap_irq_chip = {
.name = "axp152_irq_chip",
.status_base = AXP152_IRQ1_STATE,
@@ -588,6 +645,17 @@ static const struct regmap_irq_chip axp8
@@ -589,6 +646,17 @@ static const struct regmap_irq_chip axp8
.num_regs = 5,
};
@ -159,7 +159,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
static const struct mfd_cell axp20x_cells[] = {
{
.name = "axp20x-gpio",
@@ -832,6 +900,23 @@ static const struct mfd_cell axp813_cell
@@ -833,6 +901,23 @@ static const struct mfd_cell axp813_cell
},
};
@ -183,7 +183,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
static int axp20x_power_off(struct sys_off_data *data)
{
struct axp20x_dev *axp20x = data->cb_data;
@@ -941,6 +1026,28 @@ int axp20x_match_device(struct axp20x_de
@@ -942,6 +1027,28 @@ int axp20x_match_device(struct axp20x_de
*/
axp20x->regmap_irq_chip = &axp803_regmap_irq_chip;
break;
@ -317,7 +317,7 @@ Link: https://lore.kernel.org/r/TY3P286MB261162D57695AC8164ED50E298609@TY3P286MB
/* IRQs */
enum {
AXP152_IRQ_LDO0IN_CONNECT = 1,
@@ -632,6 +700,23 @@ enum axp809_irqs {
@@ -637,6 +705,23 @@ enum axp809_irqs {
AXP809_IRQ_GPIO0_INPUT,
};

18
target/linux/generic/backport-6.1/882-v6.5-mfd-axp20x-Add-support-for-AXP313a-PMIC.patch → target/linux/generic/backport-6.1/884-v6.5-mfd-axp20x-Add-support-for-AXP313a-PMIC.patch
View File

@ -58,7 +58,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
"AXP803",
"AXP806",
"AXP809",
@@ -155,6 +156,25 @@ static const struct regmap_range axp806_
@@ -156,6 +157,25 @@ static const struct regmap_range axp806_
regmap_reg_range(AXP806_REG_ADDR_EXT, AXP806_REG_ADDR_EXT),
};
@ -84,7 +84,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_range axp806_volatile_ranges[] = {
regmap_reg_range(AXP20X_IRQ1_STATE, AXP20X_IRQ2_STATE),
};
@@ -247,6 +267,11 @@ static const struct resource axp288_fuel
@@ -248,6 +268,11 @@ static const struct resource axp288_fuel
DEFINE_RES_IRQ(AXP288_IRQ_WL1),
};
@ -96,7 +96,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct resource axp803_pek_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_RIS_EDGE, "PEK_DBR"),
DEFINE_RES_IRQ_NAMED(AXP803_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
@@ -303,6 +328,15 @@ static const struct regmap_config axp288
@@ -304,6 +329,15 @@ static const struct regmap_config axp288
.cache_type = REGCACHE_RBTREE,
};
@ -112,7 +112,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_config axp806_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -455,6 +489,16 @@ static const struct regmap_irq axp288_re
@@ -456,6 +490,16 @@ static const struct regmap_irq axp288_re
INIT_REGMAP_IRQ(AXP288, BC_USB_CHNG, 5, 1),
};
@ -129,7 +129,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_irq axp803_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP803, ACIN_OVER_V, 0, 7),
INIT_REGMAP_IRQ(AXP803, ACIN_PLUGIN, 0, 6),
@@ -609,6 +653,17 @@ static const struct regmap_irq_chip axp2
@@ -610,6 +654,17 @@ static const struct regmap_irq_chip axp2
};
@ -147,7 +147,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_irq_chip axp803_regmap_irq_chip = {
.name = "axp803",
.status_base = AXP20X_IRQ1_STATE,
@@ -751,6 +806,11 @@ static const struct mfd_cell axp152_cell
@@ -752,6 +807,11 @@ static const struct mfd_cell axp152_cell
},
};
@ -159,7 +159,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct resource axp288_adc_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP288_IRQ_GPADC, "GPADC"),
};
@@ -920,8 +980,18 @@ static const struct mfd_cell axp_regulat
@@ -921,8 +981,18 @@ static const struct mfd_cell axp_regulat
static int axp20x_power_off(struct sys_off_data *data)
{
struct axp20x_dev *axp20x = data->cb_data;
@ -179,7 +179,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
/* Give capacitors etc. time to drain to avoid kernel panic msg. */
mdelay(500);
@@ -984,6 +1054,12 @@ int axp20x_match_device(struct axp20x_de
@@ -985,6 +1055,12 @@ int axp20x_match_device(struct axp20x_de
axp20x->regmap_irq_chip = &axp288_regmap_irq_chip;
axp20x->irq_flags = IRQF_TRIGGER_LOW;
break;
@ -237,7 +237,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
AXP806_DCDCA = 0,
AXP806_DCDCB,
AXP806_DCDCC,
@@ -613,6 +635,16 @@ enum axp288_irqs {
@@ -616,6 +638,16 @@ enum axp288_irqs {
AXP288_IRQ_BC_USB_CHNG,
};

0
target/linux/generic/backport-6.1/883-v6.5-regulator-axp20x-Add-support-for-AXP313a-variant.patch → target/linux/generic/backport-6.1/885-v6.5-regulator-axp20x-Add-support-for-AXP313a-variant.patch
View File

0
target/linux/generic/backport-6.1/884-v6.5-regulator-axp20x-Add-AXP15060-support.patch → target/linux/generic/backport-6.1/886-v6.5-regulator-axp20x-Add-AXP15060-support.patch
View File

14
target/linux/generic/backport-6.1/885-v6.5-mfd-axp20x-Add-support-for-AXP192.patch → target/linux/generic/backport-6.1/887-v6.5-mfd-axp20x-Add-support-for-AXP192.patch
View File

@ -79,7 +79,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
/* AXP22x ranges are shared with the AXP809, as they cover the same range */
static const struct regmap_range axp22x_writeable_ranges[] = {
regmap_reg_range(AXP20X_DATACACHE(0), AXP20X_IRQ5_STATE),
@@ -219,6 +249,19 @@ static const struct resource axp152_pek_
@@ -220,6 +250,19 @@ static const struct resource axp152_pek_
DEFINE_RES_IRQ_NAMED(AXP152_IRQ_PEK_FAL_EDGE, "PEK_DBF"),
};
@ -99,7 +99,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct resource axp20x_ac_power_supply_resources[] = {
DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_PLUGIN, "ACIN_PLUGIN"),
DEFINE_RES_IRQ_NAMED(AXP20X_IRQ_ACIN_REMOVAL, "ACIN_REMOVAL"),
@@ -301,6 +344,15 @@ static const struct regmap_config axp152
@@ -302,6 +345,15 @@ static const struct regmap_config axp152
.cache_type = REGCACHE_RBTREE,
};
@ -115,7 +115,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_config axp20x_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
@@ -378,6 +430,42 @@ static const struct regmap_irq axp152_re
@@ -379,6 +431,42 @@ static const struct regmap_irq axp152_re
INIT_REGMAP_IRQ(AXP152, GPIO0_INPUT, 2, 0),
};
@ -158,7 +158,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_irq axp20x_regmap_irqs[] = {
INIT_REGMAP_IRQ(AXP20X, ACIN_OVER_V, 0, 7),
INIT_REGMAP_IRQ(AXP20X, ACIN_PLUGIN, 0, 6),
@@ -615,6 +703,32 @@ static const struct regmap_irq_chip axp1
@@ -616,6 +704,32 @@ static const struct regmap_irq_chip axp1
.num_regs = 3,
};
@ -191,7 +191,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct regmap_irq_chip axp20x_regmap_irq_chip = {
.name = "axp20x_irq_chip",
.status_base = AXP20X_IRQ1_STATE,
@@ -711,6 +825,27 @@ static const struct regmap_irq_chip axp1
@@ -712,6 +826,27 @@ static const struct regmap_irq_chip axp1
.num_regs = 2,
};
@ -219,7 +219,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
static const struct mfd_cell axp20x_cells[] = {
{
.name = "axp20x-gpio",
@@ -1028,6 +1163,12 @@ int axp20x_match_device(struct axp20x_de
@@ -1029,6 +1164,12 @@ int axp20x_match_device(struct axp20x_de
axp20x->regmap_cfg = &axp152_regmap_config;
axp20x->regmap_irq_chip = &axp152_regmap_irq_chip;
break;
@ -338,7 +338,7 @@ Signed-off-by: Lee Jones <lee@kernel.org>
AXP20X_LDO1 = 0,
AXP20X_LDO2,
AXP20X_LDO3,
@@ -530,6 +578,42 @@ enum {
@@ -531,6 +579,42 @@ enum {
AXP152_IRQ_GPIO0_INPUT,
};

3
target/linux/generic/pending-6.1/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch
View File

@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o
--- /dev/null
+++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c
@@ -0,0 +1,392 @@
@@ -0,0 +1,393 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* MediaTek 10GE SerDes PHY driver
+ *
@ -272,6 +272,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ XTP_PCS_PWD_ASYNC(2));
+
+ usleep_range(1, 5);
+ writel(XTP_LN_FRC_TX_DATA_EN, xfi_tphy->base + REG_DIG_LN_TRX_40);
+
+ /* Setup TX DA default value */
+ mtk_xfi_tphy_rmw(xfi_tphy, 0x30b0, 0x30, 0x20);

3
target/linux/generic/pending-6.6/739-02-phy-add-driver-for-MediaTek-XFI-T-PHY.patch
View File

@ -102,7 +102,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
phy-mtk-hdmi-drv-y += phy-mtk-hdmi-mt2701.o
--- /dev/null
+++ b/drivers/phy/mediatek/phy-mtk-xfi-tphy.c
@@ -0,0 +1,392 @@
@@ -0,0 +1,393 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/* MediaTek 10GE SerDes PHY driver
+ *
@ -272,6 +272,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ XTP_PCS_PWD_ASYNC(2));
+
+ usleep_range(1, 5);
+ writel(XTP_LN_FRC_TX_DATA_EN, xfi_tphy->base + REG_DIG_LN_TRX_40);
+
+ /* Setup TX DA default value */
+ mtk_xfi_tphy_rmw(xfi_tphy, 0x30b0, 0x30, 0x20);

99
target/linux/mediatek/dts/mt7981b-unielec-u7981-01-emmc.dts Normal file
View File

@ -0,0 +1,99 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 Allen Zhao <allenzhao@unielecinc.com>
*/
/dts-v1/;
#include "mt7981b-unielec-u7981-01.dtsi"
/ {
model = "Unielec U7981-01 (EMMC)";
compatible = "unielec,u7981-01-emmc", "mediatek,mt7981";
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <8>;
max-frequency = <52000000>;
cap-mmc-highspeed;
vmmc-supply = <&reg_3p3v>;
non-removable;
status = "okay";
card@0 {
compatible = "mmc-card";
reg = <0>;
block {
compatible = "block-device";
partitions {
block-partition-env {
partname = "u-boot-env";
nvmem-layout {
compatible = "u-boot,env-layout";
};
};
block-partition-factory {
partname = "factory";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
macaddr_factory_1000: macaddr@1000 {
compatible = "mac-base";
reg = <0x1000 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
};
};
};
};
&pio {
mmc0_pins_default: mmc0-pins-default {
mux {
function = "flash";
groups = "emmc_45";
};
};
mmc0_pins_uhs: mmc0-pins-uhs {
mux {
function = "flash";
groups = "emmc_45";
};
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_1000 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&macaddr_factory_1000 1>;
nvmem-cell-names = "mac-address";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
};

116
target/linux/mediatek/dts/mt7981b-unielec-u7981-01-nand.dts Normal file
View File

@ -0,0 +1,116 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 Allen Zhao <allenzhao@unielecinc.com>
*/
/dts-v1/;
#include "mt7981b-unielec-u7981-01.dtsi"
/ {
model = "Unielec U7981-01 (NAND)";
compatible = "unielec,u7981-01-nand", "mediatek,mt7981";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0x00000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
};
factory: partition@180000 {
label = "factory";
reg = <0x180000 0x200000>;
read-only;
compatible = "nvmem-cells";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_1000: macaddr@1000 {
compatible = "mac-base";
reg = <0x1000 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "fip";
reg = <0x380000 0x0200000>;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
&gmac0 {
nvmem-cells = <&macaddr_factory_1000 0>;
nvmem-cell-names = "mac-address";
};
&gmac1 {
nvmem-cells = <&macaddr_factory_1000 1>;
nvmem-cell-names = "mac-address";
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
status = "okay";
};

124
target/linux/mediatek/dts/mt7981b-unielec-u7981-01.dtsi Normal file
View File

@ -0,0 +1,124 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 Allen Zhao <allenzhao@unielecinc.com>
*/
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "Unielec U7981-01 (EMMC)";
compatible = "unielec,u7981-01-emmc", "mediatek,mt7981";
chosen {
bootargs = "console=ttyS0,115200n1 loglevel=8 \
earlycon=uart8250,mmio32,0x11002000 \
";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins &gbe_led0_pins &gbe_led1_pins>;
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@1 {
reg = <1>;
label = "lan2";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&usb_phy {
status = "okay";
};
&xhci {
mediatek,u3p-dis-msk = <0x0>;
phys = <&u2port0 PHY_TYPE_USB2>,
<&u3port0 PHY_TYPE_USB3>;
status = "okay";
};

1
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -39,6 +39,7 @@ mediatek_setup_interfaces()
asus,tuf-ax4200|\
jdcloud,re-cp-03|\
mediatek,mt7981-rfb|\
unielec,u7981-01*|\
zbtlink,zbt-z8102ax|\
zyxel,ex5601-t0-stock|\
zyxel,ex5601-t0-ubootmod)

17
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -164,6 +164,23 @@ platform_do_upgrade() {
CI_KERNPART="fit"
CI_ROOTPART="ubi_rootfs"
nand_do_upgrade "$1"
;;
unielec,u7981-01*)
local rootdev="$(cmdline_get_var root)"
rootdev="${rootdev##*/}"
rootdev="${rootdev%p[0-9]*}"
case "$rootdev" in
mmc*)
CI_ROOTDEV="$rootdev"
CI_KERNPART="kernel"
CI_ROOTPART="rootfs"
emmc_do_upgrade "$1"
;;
*)
CI_KERNPART="fit"
nand_do_upgrade "$1"
;;
esac
;;
*)
nand_do_upgrade "$1"

22
target/linux/mediatek/image/filogic.mk
View File

@ -1096,6 +1096,28 @@ define Device/ubnt_unifi-6-plus
endef
TARGET_DEVICES += ubnt_unifi-6-plus
define Device/unielec_u7981-01
DEVICE_VENDOR := Unielec
DEVICE_MODEL := U7981-01
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 f2fsck mkf2fs fdisk partx-utils automount
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/unielec_u7981-01-emmc
DEVICE_DTS := mt7981b-unielec-u7981-01-emmc
DEVICE_VARIANT := (EMMC)
$(call Device/unielec_u7981-01)
endef
TARGET_DEVICES += unielec_u7981-01-emmc
define Device/unielec_u7981-01-nand
DEVICE_DTS := mt7981b-unielec-u7981-01-nand
DEVICE_VARIANT := (NAND)
$(call Device/unielec_u7981-01)
endef
TARGET_DEVICES += unielec_u7981-01-nand
define Device/xiaomi_mi-router-ax3000t
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := Mi Router AX3000T

2
target/linux/realtek/dts-5.15/rtl8380_zyxel_gs1900-8.dts
View File

@ -4,7 +4,7 @@
/ {
compatible = "zyxel,gs1900-8", "realtek,rtl838x-soc";
model = "ZyXEL GS1900-8 Switch";
model = "ZyXEL GS1900-8v1/v2 Switch";
};
&gpio1 {

4
target/linux/realtek/image/rtl838x.mk
View File

@ -313,6 +313,10 @@ define Device/zyxel_gs1900-8
$(Device/zyxel_gs1900)
SOC := rtl8380
DEVICE_MODEL := GS1900-8
DEVICE_VARIANT := v1
DEVICE_ALT0_VENDOR := ZyXEL
DEVICE_ALT0_MODEL := GS1900-8
DEVICE_ALT0_VARIANT := v2
ZYXEL_VERS := AAHH
endef
TARGET_DEVICES += zyxel_gs1900-8

4
tools/expat/Makefile
View File

@ -9,10 +9,10 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=expat
PKG_CPE_ID:=cpe:/a:libexpat:expat
PKG_VERSION:=2.6.0
PKG_VERSION:=2.6.2
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_HASH:=cb5f5a8ea211e1cabd59be0a933a52e3c02cc326e86a4d387d8d218e7ee47a3e
PKG_HASH:=ee14b4c5d8908b1bec37ad937607eab183d4d9806a08adee472c3c3121d27364
PKG_SOURCE_URL:=https://github.com/libexpat/libexpat/releases/download/R_$(subst .,_,$(PKG_VERSION))
HOST_BUILD_PARALLEL:=1