bcm53xx: update pinctrl driver & use its new DT binding

Driver has been updated upstream to support more precise DT binding and
avoid mapping conflicts between pinctrl and USB 2.0 PHY.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This commit is contained in:
Rafał Miłecki 2018-12-25 15:51:33 +01:00
parent 8f4841462c
commit a28f6ab27f
2 changed files with 130 additions and 0 deletions

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@ -0,0 +1,99 @@
From a49d784d5a8272d0f63c448fe8dc69e589db006e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 18 Dec 2018 16:58:08 +0100
Subject: [PATCH] pinctrl: bcm: ns: support updated DT binding as syscon
subnode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Documentation has been recently updated specifying that pinctrl should
be subnode of the CRU "syscon". Support that by using parent node for
regmap and reading "offset" property from the DT.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
---
drivers/pinctrl/bcm/pinctrl-ns.c | 29 +++++++++++++++++++----------
1 file changed, 19 insertions(+), 10 deletions(-)
--- a/drivers/pinctrl/bcm/pinctrl-ns.c
+++ b/drivers/pinctrl/bcm/pinctrl-ns.c
@@ -5,6 +5,7 @@
#include <linux/err.h>
#include <linux/io.h>
+#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
@@ -12,6 +13,7 @@
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
+#include <linux/regmap.h>
#include <linux/slab.h>
#define FLAG_BCM4708 BIT(1)
@@ -22,7 +24,8 @@ struct ns_pinctrl {
struct device *dev;
unsigned int chipset_flag;
struct pinctrl_dev *pctldev;
- void __iomem *base;
+ struct regmap *regmap;
+ u32 offset;
struct pinctrl_desc pctldesc;
struct ns_pinctrl_group *groups;
@@ -229,9 +232,9 @@ static int ns_pinctrl_set_mux(struct pin
unset |= BIT(pin_number);
}
- tmp = readl(ns_pinctrl->base);
+ regmap_read(ns_pinctrl->regmap, ns_pinctrl->offset, &tmp);
tmp &= ~unset;
- writel(tmp, ns_pinctrl->base);
+ regmap_write(ns_pinctrl->regmap, ns_pinctrl->offset, tmp);
return 0;
}
@@ -263,13 +266,13 @@ static const struct of_device_id ns_pinc
static int ns_pinctrl_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
const struct of_device_id *of_id;
struct ns_pinctrl *ns_pinctrl;
struct pinctrl_desc *pctldesc;
struct pinctrl_pin_desc *pin;
struct ns_pinctrl_group *group;
struct ns_pinctrl_function *function;
- struct resource *res;
int i;
ns_pinctrl = devm_kzalloc(dev, sizeof(*ns_pinctrl), GFP_KERNEL);
@@ -287,12 +290,18 @@ static int ns_pinctrl_probe(struct platf
return -EINVAL;
ns_pinctrl->chipset_flag = (uintptr_t)of_id->data;
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
- "cru_gpio_control");
- ns_pinctrl->base = devm_ioremap_resource(dev, res);
- if (IS_ERR(ns_pinctrl->base)) {
- dev_err(dev, "Failed to map pinctrl regs\n");
- return PTR_ERR(ns_pinctrl->base);
+ ns_pinctrl->regmap = syscon_node_to_regmap(of_get_parent(np));
+ if (IS_ERR(ns_pinctrl->regmap)) {
+ int err = PTR_ERR(ns_pinctrl->regmap);
+
+ dev_err(dev, "Failed to map pinctrl regs: %d\n", err);
+
+ return err;
+ }
+
+ if (of_property_read_u32(np, "offset", &ns_pinctrl->offset)) {
+ dev_err(dev, "Failed to get register offset\n");
+ return -ENOENT;
}
memcpy(pctldesc, &ns_pinctrl_desc, sizeof(*pctldesc));

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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Subject: [PATCH] ARM: dts: BCM5301X: Update Northstar pinctrl binding
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
---
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -400,16 +400,12 @@
#size-cells = <1>;
cru@100 {
- compatible = "simple-bus";
+ compatible = "syscon", "simple-mfd";
reg = <0x100 0x1a4>;
- ranges;
- #address-cells = <1>;
- #size-cells = <1>;
- pin-controller@1c0 {
+ pinctrl {
compatible = "brcm,bcm4708-pinmux";
- reg = <0x1c0 0x24>;
- reg-names = "cru_gpio_control";
+ offset = <0xc0>;
spi-pins {
groups = "spi_grp";