94 lines
2.3 KiB
Diff
94 lines
2.3 KiB
Diff
From 1c9a53ff7ece056eb995332f0d9523ca43fdcb5a Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= <tszucs@protonmail.ch>
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Date: Sun, 24 Sep 2023 20:37:45 +0000
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Subject: [PATCH] arm64: dts: rockchip: Add sdio node to rock-5b
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Enable SDIO on Radxa ROCK 5 Model B M.2 Key E. Add sdio node and alias as mmc2.
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Add regulator for the 3.3 V rail bringing it up during boot. Make sure EKEY_EN
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is muxed as GPIO.
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Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
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Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
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Link: https://lore.kernel.org/r/20230924203740.65744-1-tszucs@protonmail.ch
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../boot/dts/rockchip/rk3588-rock-5b.dts | 43 +++++++++++++++++++
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1 file changed, 43 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
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@@ -12,6 +12,7 @@
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aliases {
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mmc0 = &sdhci;
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mmc1 = &sdmmc;
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+ mmc2 = &sdio;
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};
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chosen {
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@@ -112,6 +113,21 @@
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regulator-max-microvolt = <1100000>;
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vin-supply = <&vcc5v0_sys>;
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};
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+
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+ vcc3v3_wf: vcc3v3-wf-regulator {
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+ compatible = "regulator-fixed";
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+ regulator-name = "vcc3v3_wf";
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+ regulator-always-on;
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+ regulator-boot-on;
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ enable-active-high;
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+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc3v3_wf_en>;
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+ startup-delay-us = <50000>;
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+ vin-supply = <&vcc5v0_sys>;
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+ };
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};
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&combphy0_ps {
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@@ -318,6 +334,12 @@
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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+
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+ m2e {
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+ vcc3v3_wf_en: vcc3v3-wf-en {
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+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
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+ };
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+ };
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};
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&pwm1 {
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@@ -354,6 +376,27 @@
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status = "okay";
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};
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+&sdio {
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+ max-frequency = <200000000>;
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+ no-sd;
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+ no-mmc;
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+ non-removable;
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+ bus-width = <4>;
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+ cap-sdio-irq;
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+ disable-wp;
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+ keep-power-in-suspend;
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+ wakeup-source;
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+ sd-uhs-sdr12;
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+ sd-uhs-sdr25;
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+ sd-uhs-sdr50;
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+ sd-uhs-sdr104;
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+ vmmc-supply = <&vcc3v3_wf>;
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+ vqmmc-supply = <&vcc_1v8_s3>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&sdiom0_pins>;
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+ status = "okay";
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+};
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+
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&spi2 {
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status = "okay";
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assigned-clocks = <&cru CLK_SPI2>;
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