4d5fe0a362
Move kernel config and patches to kernel 6.6. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
85 lines
2.9 KiB
Diff
85 lines
2.9 KiB
Diff
From a97e2d456d17e753c4540632fbc63fab825bbb6b Mon Sep 17 00:00:00 2001
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From: YouMin Chen <cym@rock-chips.com>
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Date: Tue, 29 Jun 2021 17:49:53 +0800
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Subject: [PATCH] PM / devfreq: rockchip-dfi: add support lpddr4x
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Change-Id: Icd86a458dc9843e80d9206d620a1da6a71adf799
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Signed-off-by: YouMin Chen <cym@rock-chips.com>
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---
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drivers/devfreq/event/rockchip-dfi.c | 20 ++++++++++++++------
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1 file changed, 14 insertions(+), 6 deletions(-)
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--- a/drivers/devfreq/event/rockchip-dfi.c
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+++ b/drivers/devfreq/event/rockchip-dfi.c
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@@ -21,6 +21,7 @@
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#include <soc/rockchip/rk3399_grf.h>
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#define PX30_PMUGRF_OS_REG2 0x208
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+#define PX30_PMUGRF_OS_REG3 0x20c
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#define RK3128_GRF_SOC_CON0 0x140
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#define RK3128_GRF_OS_REG1 0x1cc
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@@ -52,6 +53,8 @@
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#define MAX_DMC_NUM_CH 2
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#define READ_DRAMTYPE_INFO(n) (((n) >> 13) & 0x7)
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#define READ_CH_INFO(n) (((n) >> 28) & 0x3)
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+#define READ_DRAMTYPE_INFO_V3(n, m) ((((n) >> 13) & 0x7) | ((((m) >> 12) & 0x3) << 3))
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+#define READ_SYSREG_VERSION(m) (((m) >> 28) & 0xf)
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/* DDRMON_CTRL */
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#define DDRMON_CTRL 0x04
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#define CLR_DDRMON_CTRL (0x3f0000 << 0)
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@@ -77,6 +80,7 @@ enum {
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LPDDR2 = 5,
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LPDDR3 = 6,
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LPDDR4 = 7,
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+ LPDDR4X = 8,
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UNUSED = 0xFF
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};
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@@ -344,7 +348,7 @@ static void rockchip_dfi_start_hardware_
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/* set ddr type to dfi */
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if (info->dram_type == LPDDR3 || info->dram_type == LPDDR2)
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writel_relaxed(LPDDR2_3_EN, dfi_regs + DDRMON_CTRL);
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- else if (info->dram_type == LPDDR4)
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+ else if (info->dram_type == LPDDR4 || info->dram_type == LPDDR4X)
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writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL);
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else if (info->dram_type == DDR4)
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writel_relaxed(DDR4_EN, dfi_regs + DDRMON_CTRL);
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@@ -378,10 +382,10 @@ static int rockchip_dfi_get_busier_ch(st
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info->ch_usage[i].total = readl_relaxed(dfi_regs +
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DDRMON_CH0_COUNT_NUM + i * 20);
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- /* LPDDR4 BL = 16,other DDR type BL = 8 */
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+ /* LPDDR4 and LPDDR4X BL = 16,other DDR type BL = 8 */
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tmp = readl_relaxed(dfi_regs +
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DDRMON_CH0_DFI_ACCESS_NUM + i * 20);
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- if (info->dram_type == LPDDR4)
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+ if (info->dram_type == LPDDR4 || info->dram_type == LPDDR4X)
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tmp *= 8;
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else
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tmp *= 4;
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@@ -461,7 +465,7 @@ static __init int px30_dfi_init(struct p
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{
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struct device_node *np = pdev->dev.of_node, *node;
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struct resource *res;
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- u32 val;
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+ u32 val_2, val_3;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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data->regs = devm_ioremap_resource(&pdev->dev, res);
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@@ -475,8 +479,12 @@ static __init int px30_dfi_init(struct p
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return PTR_ERR(data->regmap_pmugrf);
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}
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- regmap_read(data->regmap_pmugrf, PX30_PMUGRF_OS_REG2, &val);
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- data->dram_type = READ_DRAMTYPE_INFO(val);
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+ regmap_read(data->regmap_pmugrf, PX30_PMUGRF_OS_REG2, &val_2);
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+ regmap_read(data->regmap_pmugrf, PX30_PMUGRF_OS_REG3, &val_3);
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+ if (READ_SYSREG_VERSION(val_3) >= 0x3)
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+ data->dram_type = READ_DRAMTYPE_INFO_V3(val_2, val_3);
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+ else
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+ data->dram_type = READ_DRAMTYPE_INFO(val_2);
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data->ch_msk = 1;
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data->clk = NULL;
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