a34255b795
Removed upstreamed: bcm27xx/patches-5.15/950-0446-drm-vc4-Fix-timings-for-VEC-modes.patch[1] Manually rebased: patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch bcm53xx/patches-5.15/180-usb-xhci-add-support-for-performing-fake-doorbell.patch All other patches automatically rebased 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.75&id=2810061452f9b748b096ad023d318690ca519aa3 Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Signed-off-by: John Audia <therealgraysky@proton.me>
54 lines
1.8 KiB
Diff
54 lines
1.8 KiB
Diff
From ba8242ab300638e8f6e46fe1596c5ee86c71b27d Mon Sep 17 00:00:00 2001
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From: Eric Anholt <eric@anholt.net>
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Date: Thu, 2 May 2019 15:11:05 -0700
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Subject: [PATCH] clk: bcm2835: Add support for setting leaf clock
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rates while running.
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As long as you wait for !BUSY, you can do glitch-free updates of clock
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rate while the clock is running.
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Signed-off-by: Eric Anholt <eric@anholt.net>
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---
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drivers/clk/bcm/clk-bcm2835.c | 22 +++++++++++++---------
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1 file changed, 13 insertions(+), 9 deletions(-)
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--- a/drivers/clk/bcm/clk-bcm2835.c
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+++ b/drivers/clk/bcm/clk-bcm2835.c
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@@ -1139,15 +1139,19 @@ static int bcm2835_clock_set_rate(struct
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spin_lock(&cprman->regs_lock);
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- /*
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- * Setting up frac support
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- *
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- * In principle it is recommended to stop/start the clock first,
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- * but as we set CLK_SET_RATE_GATE during registration of the
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- * clock this requirement should be take care of by the
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- * clk-framework.
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+ ctl = cprman_read(cprman, data->ctl_reg);
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+
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+ /* If the clock is running, we have to pause clock generation while
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+ * updating the control and div regs. This is glitchless (no clock
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+ * signals generated faster than the rate) but each reg access is two
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+ * OSC cycles so the clock will slow down for a moment.
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*/
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- ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC;
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+ if (ctl & CM_ENABLE) {
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+ cprman_write(cprman, data->ctl_reg, ctl & ~CM_ENABLE);
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+ bcm2835_clock_wait_busy(clock);
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+ }
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+
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+ ctl &= ~CM_FRAC;
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ctl |= (div & CM_DIV_FRAC_MASK) ? CM_FRAC : 0;
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cprman_write(cprman, data->ctl_reg, ctl);
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@@ -1523,7 +1527,7 @@ static struct clk_hw *bcm2835_register_c
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init.ops = &bcm2835_vpu_clock_clk_ops;
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} else {
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init.ops = &bcm2835_clock_clk_ops;
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- init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
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+ init.flags |= CLK_SET_PARENT_GATE;
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/* If the clock wasn't actually enabled at boot, it's not
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* critical.
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