20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
322 lines
8.4 KiB
Diff
322 lines
8.4 KiB
Diff
From dadc749c5ccc320127871d7c3ace51a7fae479a7 Mon Sep 17 00:00:00 2001
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From: nmbath <mark@baggywrinkle.co.uk>
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Date: Thu, 24 Feb 2022 13:10:01 +0000
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Subject: [PATCH] overlays: Overlays for WaveShare 2-Chan CAN FD HAT
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This patch adds the overlays for the Waveshare 2-Channel Isolated
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CAN FD Expansion HAT for Raspberry Pi, Multi Protections. This HAT
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is based on the mcp2518fd chip and can be run in two modes
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Mode A: can0 on spi0.0 and can1 on spi1.0 (cs = pin 26)
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Mode B: can1 on spi0.0 and can1 in spi0.1
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Interupts: can0 pin 25 / can1 pin 16
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https://www.waveshare.com/2-ch-can-fd-hat.htm
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Overlays generated by:
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Mode A: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=26,cs0_spidev=false \
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mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
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mcp251xfd-overlay.dts,spi1-0,interrupt=16
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Mode B: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 \
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mcp251xfd-overlay.dts,spi0-1,interrupt=16
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---
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arch/arm/boot/dts/overlays/Makefile | 2 +
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arch/arm/boot/dts/overlays/README | 20 +++
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.../waveshare-can-fd-hat-mode-a-overlay.dts | 140 ++++++++++++++++++
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.../waveshare-can-fd-hat-mode-b-overlay.dts | 103 +++++++++++++
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4 files changed, 265 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-a-overlay.dts
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create mode 100644 arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-b-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -251,6 +251,8 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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w1-gpio.dtbo \
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w1-gpio-pullup.dtbo \
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w5500.dtbo \
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+ waveshare-can-fd-hat-mode-a.dtbo \
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+ waveshare-can-fd-hat-mode-b.dtbo \
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wittypi.dtbo \
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wm8960-soundcard.dtbo
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -3879,6 +3879,26 @@ Params: int_pin GPIO use
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cs SPI bus Chip Select (default 0)
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+Name: waveshare-can-fd-hat-mode-a
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+Info: Overlay for the Waveshare 2-Channel Isolated CAN FD Expansion HAT
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+ for Raspberry Pi, Multi Protections. Use this overlay when the
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+ HAT is configured in Mode A (Default), with can0 on spi0.0
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+ and can1 on spi1.0.
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+ https://www.waveshare.com/2-ch-can-fd-hat.htm
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+Load: dtoverlay=waveshare-can-fd-hat-mode-a
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+Params: <None>
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+
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+
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+Name: waveshare-can-fd-hat-mode-b
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+Info: Overlay for the Waveshare 2-Channel Isolated CAN FD Expansion HAT
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+ for Raspberry Pi, Multi Protections. Use this overlay when the
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+ HAT is configured in Mode B (requires hardware modification), with
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+ can0 on spi0.0 and can1 on spi0.1.
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+ https://www.waveshare.com/2-ch-can-fd-hat.htm
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+Load: dtoverlay=waveshare-can-fd-hat-mode-b
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+Params: <None>
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+
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+
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Name: wittypi
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Info: Configures the wittypi RTC module.
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Load: dtoverlay=wittypi,<param>=<val>
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-a-overlay.dts
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@@ -0,0 +1,140 @@
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+// redo: ovmerge -c spi1-1cs-overlay.dts,cs0_pin=26,cs0_spidev=false mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi1-0,interrupt=16
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+
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+// Device tree overlay for https://www.waveshare.com/2-ch-can-fd-hat.htm
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+// in "Mode A" (default) configuration
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+// for details see https://www.waveshare.com/wiki/2-CH_CAN_FD_HAT
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+
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+/dts-v1/;
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+/plugin/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/pinctrl/bcm2835.h>
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+
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+/ {
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+ compatible = "brcm,bcm2835";
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+ fragment@0 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ spi1_pins: spi1_pins {
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+ brcm,pins = <19 20 21>;
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+ brcm,function = <3>;
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+ };
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+ spi1_cs_pins: spi1_cs_pins {
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+ brcm,pins = <26>;
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+ brcm,function = <1>;
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+ };
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+ };
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+ };
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+ fragment@1 {
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+ target = <&spi1>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&spi1_pins &spi1_cs_pins>;
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+ cs-gpios = <&gpio 26 1>;
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+ status = "okay";
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+ spidev@0 {
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+ compatible = "spidev";
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+ reg = <0>;
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ spi-max-frequency = <125000000>;
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+ status = "disabled";
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+ };
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+ };
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+ };
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+ fragment@2 {
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+ target = <&aux>;
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+ __overlay__ {
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+ status = "okay";
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+ };
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+ };
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+ fragment@3 {
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+ target = <&spidev0>;
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+ fragment@4 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ mcp251xfd_pins: mcp251xfd_spi0_0_pins {
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+ brcm,pins = <25>;
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+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
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+ };
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+ };
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+ };
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+ fragment@5 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+ };
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+ fragment@6 {
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+ target = <&spi0>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ mcp251xfd@0 {
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+ compatible = "microchip,mcp251xfd";
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+ reg = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mcp251xfd_pins>;
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+ spi-max-frequency = <20000000>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&clk_mcp251xfd_osc>;
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+ };
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+ };
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+ };
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+ fragment@7 {
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+ target-path = "spi1/spidev@0";
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+ fragment@8 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ mcp251xfd_pins_1: mcp251xfd_spi1_0_pins {
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+ brcm,pins = <16>;
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+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
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+ };
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+ };
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+ };
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+ fragment@9 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ clk_mcp251xfd_osc_1: mcp251xfd-spi1-0-osc {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+ };
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+ fragment@10 {
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+ target = <&spi1>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ mcp251xfd@0 {
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+ compatible = "microchip,mcp251xfd";
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+ reg = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mcp251xfd_pins_1>;
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+ spi-max-frequency = <20000000>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&clk_mcp251xfd_osc_1>;
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+ };
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/waveshare-can-fd-hat-mode-b-overlay.dts
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@@ -0,0 +1,103 @@
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+// redo: ovmerge -c mcp251xfd-overlay.dts,spi0-0,interrupt=25 mcp251xfd-overlay.dts,spi0-1,interrupt=16
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+
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+// Device tree overlay for https://www.waveshare.com/2-ch-can-fd-hat.htm
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+// in "Mode B" (requried hardware modification) configuration
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+// for details see https://www.waveshare.com/wiki/2-CH_CAN_FD_HAT
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+
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+
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+/dts-v1/;
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+/plugin/;
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/pinctrl/bcm2835.h>
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+
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+/ {
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+ compatible = "brcm,bcm2835";
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+ fragment@0 {
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+ target = <&spidev0>;
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+ fragment@1 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ mcp251xfd_pins: mcp251xfd_spi0_0_pins {
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+ brcm,pins = <25>;
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+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
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+ };
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+ };
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+ };
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+ fragment@2 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ clk_mcp251xfd_osc: mcp251xfd-spi0-0-osc {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+ };
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+ fragment@3 {
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+ target = <&spi0>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ mcp251xfd@0 {
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+ compatible = "microchip,mcp251xfd";
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+ reg = <0>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mcp251xfd_pins>;
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+ spi-max-frequency = <20000000>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&clk_mcp251xfd_osc>;
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+ };
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+ };
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+ };
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+ fragment@4 {
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+ target = <&spidev1>;
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+ __overlay__ {
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+ status = "disabled";
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+ };
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+ };
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+ fragment@5 {
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+ target = <&gpio>;
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+ __overlay__ {
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+ mcp251xfd_pins_1: mcp251xfd_spi0_1_pins {
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+ brcm,pins = <16>;
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+ brcm,function = <BCM2835_FSEL_GPIO_IN>;
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+ };
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+ };
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+ };
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+ fragment@6 {
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+ target-path = "/clocks";
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+ __overlay__ {
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+ clk_mcp251xfd_osc_1: mcp251xfd-spi0-1-osc {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+ };
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+ fragment@7 {
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+ target = <&spi0>;
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+ __overlay__ {
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+ status = "okay";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ mcp251xfd@1 {
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+ compatible = "microchip,mcp251xfd";
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+ reg = <1>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&mcp251xfd_pins_1>;
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+ spi-max-frequency = <20000000>;
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+ interrupt-parent = <&gpio>;
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+ interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
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+ clocks = <&clk_mcp251xfd_osc_1>;
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+ };
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+ };
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+ };
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+};
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