2f663cab46
Replace patches for MediaTek Ethernet driver SGMII/SerDes unit with their corresponding upstream patches. Not all of the patches in our tree went upstream as-is, some are slightly different implementations, and they require the phylink_pcs helpers now made available. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
49 lines
1.6 KiB
Diff
49 lines
1.6 KiB
Diff
From f752c0df13dfeb721c11d3debb79f08cf437344f Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Thu, 27 Oct 2022 14:11:13 +0100
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Subject: [PATCH 07/10] net: mtk_eth_soc: move interface speed selection
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Move the selection of the underlying interface speed to the pcs_config
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function, so we always program the interface speed.
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_sgmii.c | 18 ++++++++++--------
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1 file changed, 10 insertions(+), 8 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
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+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
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@@ -53,14 +53,6 @@ static void mtk_pcs_setup_mode_an(struct
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static void mtk_pcs_setup_mode_force(struct mtk_pcs *mpcs,
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phy_interface_t interface)
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{
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- unsigned int rgc3;
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-
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- if (interface == PHY_INTERFACE_MODE_2500BASEX)
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- rgc3 = RG_PHY_SPEED_3_125G;
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-
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- regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
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- RG_PHY_SPEED_3_125G, rgc3);
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-
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/* Disable SGMII AN */
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regmap_update_bits(mpcs->regmap, SGMSYS_PCS_CONTROL_1,
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SGMII_AN_ENABLE, 0);
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@@ -77,6 +69,16 @@ static int mtk_pcs_config(struct phylink
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bool permit_pause_to_mac)
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{
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struct mtk_pcs *mpcs = pcs_to_mtk_pcs(pcs);
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+ unsigned int rgc3;
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+
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+ if (interface == PHY_INTERFACE_MODE_2500BASEX)
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+ rgc3 = RG_PHY_SPEED_3_125G;
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+ else
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+ rgc3 = 0;
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+
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+ /* Configure the underlying interface speed */
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+ regmap_update_bits(mpcs->regmap, mpcs->ana_rgc3,
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+ RG_PHY_SPEED_3_125G, rgc3);
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/* Setup SGMIISYS with the determined property */
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if (interface != PHY_INTERFACE_MODE_SGMII)
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