修正network初始化的配置文件

support rtl8367s sfp port
fix sv901 rtl8367s&led;add support for lcd&wifi
2023-06-14 09:15:52 +08:00 · 2023-05-30 05:19:14 +00:00 · 2023-04-28 09:01:50 +00:00 · 2023-04-28 08:56:40 +00:00 · 2023-04-21 15:28:05 +00:00 · 2023-04-19 23:56:38 +08:00
28 changed files with 3352 additions and 75 deletions
--- a/package/app_packages/lcd_info/Makefile
+++ b/package/app_packages/lcd_info/Makefile
@ -0,0 +1,40 @@
+# 导入通用编译规则
+include $(TOPDIR)/rules.mk
+
+# name和version用来定义编译目录名$(PKG_BUILD_DIR)]
+PKG_NAME:=lcdinfo
+PKG_VERSION:=1.0
+PKG_RELEASE:=1
+#PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)  # 也可以直接定义编译目录名，代替默认的目录名
+
+# 导入包定义
+include $(INCLUDE_DIR)/package.mk
+
+# 包定义：定义我们的包在menuconfig中的位置
+# Makefile中的define语法可以理解为函数，用于定义命令集合
+define Package/lcdinfo
+  SECTION:=app_packages
+  CATEGORY:=App_packages
+  TITLE:=lcdinfo, display bmp file.
+endef
+
+# 包描述：关于我们包的更详细的描述
+define Package/lcdinfo/description
+  display bmp file
+endef
+
+# 编译准备. 必须使用tab缩进，表示是可执行的命令
+define Build/Prepare
+	echo "Here is Build/Prepare"
+	mkdir -p $(PKG_BUILD_DIR)
+	cp ./src/* $(PKG_BUILD_DIR)/
+endef
+
+# 安装
+define Package/lcdinfo/install
+	$(INSTALL_DIR) $(1)/usr/bin
+	$(INSTALL_BIN) $(PKG_BUILD_DIR)/lcdinfo $(1)/usr/bin
+endef
+
+# 这一行总是在最后
+$(eval $(call BuildPackage,lcdinfo))
--- a/package/app_packages/lcd_info/src/Makefile
+++ b/package/app_packages/lcd_info/src/Makefile
@ -0,0 +1,12 @@
+TARGET = lcdinfo
+OBJS = lcdinfo.o
+
+$(TARGET):$(OBJS)
+	$(CC) $(LDFLAGS) -o $@ $^
+
+%.o: %.c
+	$(CC) $(CFLAGS) -c $< -o $@
+
+.PHONY: clean
+clean:
+	rm -f $(TARGET) $(OBJS)
--- a/package/app_packages/lcd_info/src/lcdinfo.c
+++ b/package/app_packages/lcd_info/src/lcdinfo.c
@ -0,0 +1,359 @@
+#include <unistd.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <fcntl.h>
+#include <string.h>
+#include <linux/fb.h>
+#include <sys/mman.h>
+#include <sys/ioctl.h>
+#include <arpa/inet.h>
+#include <errno.h>
+
+//14byte文件头
+typedef struct
+{
+	char cfType[2];  //文件类型，"BM"(0x4D42)
+	int  cfSize;     //文件大小（字节）
+	int  cfReserved; //保留，值为0
+	int  cfoffBits;  //数据区相对于文件头的偏移量（字节）
+}__attribute__((packed)) BITMAPFILEHEADER;
+//__attribute__((packed))的作用是告诉编译器取消结构在编译过程中的优化对齐
+
+//40byte信息头
+typedef struct
+{
+	char ciSize[4];          //BITMAPFILEHEADER所占的字节数
+	int  ciWidth;            //宽度
+	int  ciHeight;           //高度
+	char ciPlanes[2];        //目标设备的位平面数，值为1
+	int  ciBitCount;         //每个像素的位数
+	char ciCompress[4];      //压缩说明
+	char ciSizeImage[4];     //用字节表示的图像大小，该数据必须是4的倍数
+	char ciXPelsPerMeter[4]; //目标设备的水平像素数/米
+	char ciYPelsPerMeter[4]; //目标设备的垂直像素数/米
+	char ciClrUsed[4];       //位图使用调色板的颜色数
+	char ciClrImportant[4];  //指定重要的颜色数，当该域的值等于颜色数时（或者等于0时），表示所有颜色都一样重要
+}__attribute__((packed)) BITMAPINFOHEADER;
+
+typedef struct
+{
+	unsigned char blue;
+	unsigned char green;
+	unsigned char red;
+	unsigned char reserved;
+}__attribute__((packed)) PIXEL; //颜色模式RGB
+
+
+
+typedef struct
+{
+	int          fbfd;
+	char         *fbp;
+	unsigned int xres;
+	unsigned int yres;
+	unsigned int xres_virtual;
+	unsigned int yres_virtual;
+	unsigned int xoffset;
+	unsigned int yoffset;
+	unsigned int bpp;
+	unsigned long line_length;
+	unsigned long size;
+
+	struct fb_bitfield red;
+	struct fb_bitfield green;
+	struct fb_bitfield blue;
+} FB_INFO;
+
+typedef struct
+{
+	unsigned int width;
+	unsigned int height;
+	unsigned int bpp;
+	unsigned long size;
+	unsigned int data_offset;
+} IMG_INFO;
+
+
+
+FB_INFO fb_info;
+IMG_INFO img_info;
+
+int show_bmp(char *img_name);
+
+static int cursor_bitmap_format_convert(char *dst,char *src, unsigned long img_len_one_line)
+{
+	int img_len ,fb_len ;
+	char *p;
+	__u32 val;
+	PIXEL pix;
+
+	p = (char *)&val;
+
+	img_len = img_info.width; /*一行图片的长度*/
+	fb_len = fb_info.xres; /*一行显示屏的长度*/
+
+	/*进行x轴的偏移*/
+	dst += fb_info.xoffset * (fb_info.bpp / 8);
+	fb_len -= fb_info.xoffset;
+
+	/*bmp 数据是上下左右颠倒的，这里只进行左右的处理*/
+	/*先定位到图片的最后一个像素的地址，然后往第一个像素的方向处理，进行左右颠倒的处理*/
+	src += img_len_one_line - 1;
+
+	/*处理一行要显示的数据*/
+	while(1) {
+		if (img_info.bpp == 32)
+			pix.reserved = *(src--);
+		pix.red   = *(src--);
+		pix.green = *(src--);
+		pix.blue  = *(src--);
+
+		val = 0x00;
+		val |= (pix.red >> (8 - fb_info.red.length)) << fb_info.red.offset;
+		val |= (pix.green >> (8 - fb_info.green.length)) << fb_info.green.offset;
+		val |= (pix.blue >> (8 - fb_info.blue.length)) << fb_info.blue.offset;
+
+
+		if (fb_info.bpp == 16) {
+			*(dst++) = *(p + 0);
+			*(dst++) = *(p + 1);
+		}
+		else if (fb_info.bpp == 24) {
+			*(dst++) = *(p + 0);
+			*(dst++) = *(p + 1);
+			*(dst++) = *(p + 2);
+		}
+		else if (fb_info.bpp == 32) {
+			*(dst++) = *(p + 0);
+			*(dst++) = *(p + 1);
+			*(dst++) = *(p + 2);
+			*(dst++) = *(p + 3);
+		}
+
+		/*超过图片长度或显示屏长度认为一行处理完了*/
+		img_len--;
+		fb_len--;
+		if (img_len <= 0 || fb_len <= 0)
+			break;
+	}
+#if 0
+	printf("r = %d\n", pix.red);
+	printf("g = %d\n", pix.green);
+	printf("b = %d\n", pix.blue);
+#endif
+	return 0;
+}
+
+int show_bmp(char *img_name)
+{
+
+	FILE *fp;
+	int ret = 0;
+	BITMAPFILEHEADER FileHead;
+	BITMAPINFOHEADER InfoHead;
+
+	if(img_name == NULL) {
+		printf("img_name is null\n");
+		return -1;
+	}
+
+	fp = fopen( img_name, "rb" );
+	if(fp == NULL) {
+		printf("img[%s] open failed\n", img_name);
+		ret = -1;
+		goto err_showbmp;
+	}
+
+	/* 移位到文件头部 */
+	fseek(fp, 0, SEEK_SET);
+
+	ret = fread(&FileHead, sizeof(BITMAPFILEHEADER), 1, fp);
+	if ( ret != 1) {
+		printf("img read failed\n");
+		ret = -1;
+		goto err_showbmp;
+	}
+
+	//检测是否是bmp图像
+	if (memcmp(FileHead.cfType, "BM", 2) != 0) {
+		printf("it's not a BMP file[%c%c]\n", FileHead.cfType[0], FileHead.cfType[1]);
+		ret = -1;
+		goto err_showbmp;
+	}
+
+	ret = fread( (char *)&InfoHead, sizeof(BITMAPINFOHEADER),1, fp );
+	if ( ret != 1) {
+		printf("read infoheader error!\n");
+		ret = -1;
+		goto err_showbmp;
+	}
+
+	img_info.width       = InfoHead.ciWidth;
+	img_info.height      = InfoHead.ciHeight;
+	img_info.bpp         = InfoHead.ciBitCount;
+	img_info.size        = FileHead.cfSize;
+	img_info.data_offset = FileHead.cfoffBits;
+
+	printf("img info w[%d] h[%d] bpp[%d] size[%ld] offset[%d]\n", img_info.width, img_info.height, img_info.bpp, img_info.size, img_info.data_offset);
+
+	if (img_info.bpp != 24 && img_info.bpp != 32) {
+		printf("img bpp is not 24 or 32\n");
+		ret = -1;
+		goto err_showbmp;
+	}
+
+
+	/*
+	 *一行行处理
+	 */
+	char *buf_img_one_line;
+	char *buf_fb_one_line;
+	char *p;
+	int fb_height;
+
+	long img_len_one_line = img_info.width * (img_info.bpp / 8);
+	long fb_len_one_line = fb_info.line_length;
+
+	printf("img_len_one_line = %d\n", img_len_one_line);
+	printf("fb_len_one_line = %d\n", fb_info.line_length);
+
+	buf_img_one_line = (char *)calloc(1, img_len_one_line + 256);
+	if(buf_img_one_line == NULL) {
+		printf("alloc failed\n");
+		ret = -1;
+		goto err_showbmp;
+	}
+
+	buf_fb_one_line = (char *)calloc(1, fb_len_one_line + 256);
+	if(buf_fb_one_line == NULL) {
+		printf("alloc failed\n");
+		ret = -1;
+		goto err_showbmp;
+	}
+
+
+	fseek(fp, img_info.data_offset, SEEK_SET);
+
+	p = fb_info.fbp + fb_info.yoffset * fb_info.line_length; /*进行y轴的偏移*/
+	fb_height = fb_info.yres;
+	while (1) {
+		memset(buf_img_one_line, 0, img_len_one_line);
+		memset(buf_fb_one_line, 0, fb_len_one_line);
+		ret = fread(buf_img_one_line, 1, img_len_one_line, fp);
+		if (ret < img_len_one_line) {
+			/*图片读取完成，则图片显示完成*/
+			printf("read to end of img file\n");
+			cursor_bitmap_format_convert(buf_fb_one_line, buf_img_one_line, img_len_one_line); /*数据转换*/
+			memcpy(fb_info.fbp, buf_fb_one_line, fb_len_one_line);
+			break;
+		}
+
+		cursor_bitmap_format_convert(buf_fb_one_line, buf_img_one_line, img_len_one_line); /*数据转换*/
+		memcpy(p, buf_fb_one_line, fb_len_one_line); /*显示一行*/
+		p += fb_len_one_line;
+
+		/*超过显示屏宽度认为图片显示完成*/
+		fb_height--;
+		if (fb_height <= 0)
+			break;
+	}
+
+	free(buf_img_one_line);
+	free(buf_fb_one_line);
+
+	fclose(fp);
+	return ret;
+err_showbmp:
+	if (fp)
+		fclose(fp);
+	return ret;
+}
+
+int show_picture(char *img_name)
+{
+	struct fb_var_screeninfo vinfo;
+	struct fb_fix_screeninfo finfo;
+
+	if (fb_info.fbfd <= -1) {
+		printf("fb open fialed\n");
+		return -1;
+	}
+
+	if (ioctl(fb_info.fbfd, FBIOGET_FSCREENINFO, &finfo)) {
+		printf("fb ioctl fialed\n");
+		return -1;
+	}
+
+	if (ioctl(fb_info.fbfd, FBIOGET_VSCREENINFO, &vinfo)) {
+		printf("fb ioctl fialed\n");
+		return -1;
+	}
+
+	fb_info.xres = vinfo.xres;
+	fb_info.yres = vinfo.yres;
+	fb_info.xres_virtual = vinfo.xres_virtual;
+	fb_info.yres_virtual = vinfo.yres_virtual;
+	fb_info.xoffset = vinfo.xoffset;
+	fb_info.yoffset = vinfo.yoffset;
+	fb_info.bpp  = vinfo.bits_per_pixel;
+	fb_info.line_length = finfo.line_length;
+	fb_info.size = finfo.smem_len;
+
+	memcpy(&fb_info.red, &vinfo.red, sizeof(struct fb_bitfield));
+	memcpy(&fb_info.green, &vinfo.green, sizeof(struct fb_bitfield));
+	memcpy(&fb_info.blue, &vinfo.blue, sizeof(struct fb_bitfield));
+
+	printf("fb info x[%d] y[%d] x_v[%d] y_v[%d] xoffset[%d] yoffset[%d] bpp[%d] line_length[%ld] size[%ld]\n", fb_info.xres, fb_info.yres, fb_info.xres_virtual, fb_info.yres_virtual, fb_info.xoffset, fb_info.yoffset, fb_info.bpp, fb_info.line_length, fb_info.size);
+
+	printf("fb info red off[%d] len[%d] msb[%d]\n", fb_info.red.offset, fb_info.red.length, fb_info.red.msb_right);
+	printf("fb info green off[%d] len[%d] msb[%d]\n", fb_info.green.offset, fb_info.green.length, fb_info.green.msb_right);
+	printf("fb info blue off[%d] len[%d] msb[%d]\n", fb_info.blue.offset, fb_info.blue.length, fb_info.blue.msb_right);
+
+	if (fb_info.bpp != 16 && fb_info.bpp != 24 && fb_info.bpp != 32) {
+		printf("fb bpp is not 16,24 or 32\n");
+		return -1;
+	}
+
+	if (fb_info.red.length > 8 || fb_info.green.length > 8 || fb_info.blue.length > 8) {
+		printf("fb red|green|blue length is invalid\n");
+		return -1;
+	}
+
+	// 内存映射
+	fb_info.fbp = (char *)mmap(0, fb_info.size, PROT_READ | PROT_WRITE, MAP_SHARED, fb_info.fbfd, 0);
+	if (fb_info.fbp == (char *)-1) {
+		printf("mmap fialed\n");
+		return -1;
+	}
+
+	show_bmp(img_name);
+
+	//删除映射
+	munmap(fb_info.fbp, fb_info.size);
+
+	return 0;
+}
+
+
+int main(int argc, char **argv)
+{
+	char img_name[64];
+
+	if (argc != 2) {
+		printf("arg error\n");
+		return 0;
+	}
+
+	snprintf(img_name, sizeof(img_name), "%s", argv[1]);
+	printf("img_name = %s\n", img_name);
+
+	fb_info.fbfd = open("/dev/fb0", O_RDWR);
+	if (!fb_info.fbfd) {
+		printf("Error: cannot open framebuffer device(/dev/fb0).\n");
+		return -1;
+	}
+	show_picture(img_name);
+
+	close(fb_info.fbfd);
+		return 0;
+}
--- a/package/boot/uboot-rockchip/Makefile
+++ b/package/boot/uboot-rockchip/Makefile
@ -146,6 +146,17 @@ define U-Boot/rocktech-mpc1903-rk3399
  USE_RKBIN:=1
 endef

+define U-Boot/scensmart-sv901-rk3399
+  BUILD_SUBTARGET:=armv8
+  NAME:=ScenSmart SV901
+  BUILD_DEVICES:= \
+    scensmart_sv901
+  DEPENDS:=+PACKAGE_u-boot-scensmart-sv901-rk3399:arm-trusted-firmware-rk3399
+  PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor
+  ATF:=rk3399_bl31_v1.35.elf
+  USE_RKBIN:=1
+endef
+
 define U-Boot/sharevdi-h3399pc-rk3399
  BUILD_SUBTARGET:=armv8
  NAME:=SHAREVDI H3399PC
@ -272,7 +283,8 @@ UBOOT_TARGETS := \
  nanopi-r2c-rk3328 \
  nanopi-r2s-rk3328 \
  orangepi-r1-plus-rk3328 \
-  orangepi-r1-plus-lts-rk3328
+  orangepi-r1-plus-lts-rk3328 \
+  scensmart-sv901-rk3399

 UBOOT_CONFIGURE_VARS += USE_PRIVATE_LIBGCC=yes

--- a/package/boot/uboot-rockchip/patches/001-Revert-rockchip-rk3399-Drop-altbootcmd.patch
+++ b/package/boot/uboot-rockchip/patches/001-Revert-rockchip-rk3399-Drop-altbootcmd.patch
@ -0,0 +1,26 @@
+From 1ab5d2b9cf1b9c1c7ccb58243992fb163c64a14d Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@immortalwrt.org>
+Date: Wed, 5 Apr 2023 21:06:19 +0800
+Subject: [PATCH 1/3] Revert "rockchip: rk3399: Drop altbootcmd"
+
+This reverts commit d00fb6421c8fad639f608f55f9291305061ffb17.
+
+Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+---
+ include/configs/rk3399_common.h | 5 ++++-
+ 1 file changed, 4 insertions(+), 1 deletion(-)
+
+--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
+@@ -52,7 +52,10 @@
+ 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ 	"partitions=" PARTS_DEFAULT \
+ 	ROCKCHIP_DEVICE_SETTINGS \
+-	"boot_targets=" BOOT_TARGETS "\0"
+	"boot_targets=" BOOT_TARGETS "\0" \
+	"altbootcmd=" \
+		"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
+		"run distro_bootcmd\0"
+ 
+ #endif
+ 
--- a/package/boot/uboot-rockchip/patches/002-Revert-rockchip-Disable-DISTRO_DEFAULTS-for-rk3399-b.patch
+++ b/package/boot/uboot-rockchip/patches/002-Revert-rockchip-Disable-DISTRO_DEFAULTS-for-rk3399-b.patch
@ -0,0 +1,24 @@
+From 535b09f84be0660ef5e85431328746e74cc8e6b7 Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@immortalwrt.org>
+Date: Wed, 5 Apr 2023 21:08:21 +0800
+Subject: [PATCH 2/3] Revert "rockchip: Disable DISTRO_DEFAULTS for rk3399
+ boards"
+
+This reverts commit 2b9cc7845cf96955db363519faab9a78e166c453.
+
+Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+---
+ arch/arm/Kconfig | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
+@@ -1955,7 +1955,7 @@ config ARCH_ROCKCHIP
+ 	imply ADC
+ 	imply CMD_DM
+ 	imply DEBUG_UART_BOARD_INIT
+-	imply DISTRO_DEFAULTS if !ROCKCHIP_RK3399
+	imply DISTRO_DEFAULTS
+ 	imply BOOTSTD_DEFAULTS if !DISTRO_DEFAULTS
+ 	imply FAT_WRITE
+ 	imply SARADC_ROCKCHIP
--- a/package/boot/uboot-rockchip/patches/003-Revert-rockchip-Convert-rockpro64-rk3399-to-use-stan.patch
+++ b/package/boot/uboot-rockchip/patches/003-Revert-rockchip-Convert-rockpro64-rk3399-to-use-stan.patch
@ -0,0 +1,50 @@
+From 93ac12531f7c672ef1fe7689cf8b67ec2372efef Mon Sep 17 00:00:00 2001
+From: Tianling Shen <cnsztl@immortalwrt.org>
+Date: Wed, 5 Apr 2023 21:08:27 +0800
+Subject: [PATCH 3/3] Revert "rockchip: Convert rockpro64-rk3399 to use
+ standard boot"
+
+This reverts commit 3891c68ef50eda38d78c95ecd03aed030aa6bb53.
+
+Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
+---
+ include/configs/rk3399_common.h   | 5 ++++-
+ include/configs/rockchip-common.h | 2 --
+ 2 files changed, 4 insertions(+), 3 deletions(-)
+
+--- a/include/configs/rk3399_common.h
+++ b/include/configs/rk3399_common.h
+@@ -47,12 +47,15 @@
+ #define ROCKCHIP_DEVICE_SETTINGS
+ #endif
+ 
+#include <config_distro_bootcmd.h>
+#include <environment/distro/sf.h>
+ #define CFG_EXTRA_ENV_SETTINGS \
+ 	ENV_MEM_LAYOUT_SETTINGS \
+ 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ 	"partitions=" PARTS_DEFAULT \
+ 	ROCKCHIP_DEVICE_SETTINGS \
+-	"boot_targets=" BOOT_TARGETS "\0" \
+	BOOTENV \
+	BOOTENV_SF \
+ 	"altbootcmd=" \
+ 		"setenv boot_syslinux_conf extlinux/extlinux-rollback.conf;" \
+ 		"run distro_bootcmd\0"
+--- a/include/configs/rockchip-common.h
+++ b/include/configs/rockchip-common.h
+@@ -67,14 +67,12 @@
+ 	BOOT_TARGET_PXE(func) \
+ 	BOOT_TARGET_DHCP(func) \
+ 	BOOT_TARGET_SF(func)
+-#define BOOT_TARGETS	"mmc1 mmc0 nvme scsi usb pxe dhcp spi"
+ #else
+ #define BOOT_TARGET_DEVICES(func) \
+ 	BOOT_TARGET_MMC(func) \
+ 	BOOT_TARGET_USB(func) \
+ 	BOOT_TARGET_PXE(func) \
+ 	BOOT_TARGET_DHCP(func)
+-#define BOOT_TARGETS	"mmc1 mmc0 usb pxe dhcp"
+ #endif
+ 
+ #ifdef CONFIG_ARM64
--- a/package/boot/uboot-rockchip/patches/305-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch
+++ b/package/boot/uboot-rockchip/patches/305-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch
@ -45,24 +45,33 @@
 +};
 --- /dev/null
 +++ b/configs/nanopi-r4se-rk3399_defconfig
-@@ -0,0 +1,65 @@
+@@ -0,0 +1,73 @@
 +CONFIG_ARM=y
 +CONFIG_SKIP_LOWLEVEL_INIT=y
 +CONFIG_COUNTER_FREQUENCY=24000000
 +CONFIG_ARCH_ROCKCHIP=y
 +CONFIG_TEXT_BASE=0x00200000
 +CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 +CONFIG_ENV_OFFSET=0x3F8000
 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
 +CONFIG_ROCKCHIP_RK3399=y
 +CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
 +CONFIG_DEBUG_UART_CLOCK=24000000
 +CONFIG_SYS_LOAD_ADDR=0x800800
 +CONFIG_DEBUG_UART=y
 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
 +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 +CONFIG_SPL_STACK_R=y
 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 +CONFIG_TPL=y
@ -82,30 +91,29 @@
 +CONFIG_MMC_DW_ROCKCHIP=y
 +CONFIG_MMC_SDHCI=y
 +CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_ETH=y
 +CONFIG_ETH_DESIGNWARE=y
 +CONFIG_GMAC_ROCKCHIP=y
 +CONFIG_PMIC_RK8XX=y
 +CONFIG_REGULATOR_PWM=y
 +CONFIG_REGULATOR_RK8XX=y
 +CONFIG_PWM_ROCKCHIP=y
-+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 +CONFIG_BAUDRATE=1500000
 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
 +CONFIG_SYSRESET=y
 +CONFIG_USB=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_DWC3=y
 +CONFIG_USB_EHCI_HCD=y
 +CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_KEYBOARD=y
 +CONFIG_USB_HOST_ETHER=y
 +CONFIG_USB_ETHER_ASIX=y
 +CONFIG_USB_ETHER_ASIX88179=y
 +CONFIG_USB_ETHER_MCS7830=y
 +CONFIG_USB_ETHER_RTL8152=y
 +CONFIG_USB_ETHER_SMSC95XX=y
-+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO=y
 +CONFIG_DISPLAY=y
 +CONFIG_VIDEO_ROCKCHIP=y
 +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
--- a/package/boot/uboot-rockchip/patches/306-rockchip-rk3399-Add-support-for-Rongpin-king3399.patch
+++ b/package/boot/uboot-rockchip/patches/306-rockchip-rk3399-Add-support-for-Rongpin-king3399.patch
@ -1,23 +1,32 @@
 --- /dev/null
 +++ b/configs/rongpin-king3399-rk3399_defconfig
-@@ -0,0 +1,65 @@
+@@ -0,0 +1,73 @@
 +CONFIG_ARM=y
 +CONFIG_SKIP_LOWLEVEL_INIT=y
 +CONFIG_COUNTER_FREQUENCY=24000000
 +CONFIG_ARCH_ROCKCHIP=y
 +CONFIG_TEXT_BASE=0x00200000
 +CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 +CONFIG_ENV_OFFSET=0x3F8000
 +CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se"
 +CONFIG_ROCKCHIP_RK3399=y
 +CONFIG_TARGET_EVB_RK3399=y
+CONFIG_SPL_STACK=0x400000
 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
 +CONFIG_DEBUG_UART_CLOCK=24000000
 +CONFIG_SYS_LOAD_ADDR=0x800800
 +CONFIG_DEBUG_UART=y
 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb"
 +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 +CONFIG_SPL_STACK_R=y
 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 +CONFIG_TPL=y
@ -37,30 +46,29 @@
 +CONFIG_MMC_DW_ROCKCHIP=y
 +CONFIG_MMC_SDHCI=y
 +CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_ETH=y
 +CONFIG_ETH_DESIGNWARE=y
 +CONFIG_GMAC_ROCKCHIP=y
 +CONFIG_PMIC_RK8XX=y
 +CONFIG_REGULATOR_PWM=y
 +CONFIG_REGULATOR_RK8XX=y
 +CONFIG_PWM_ROCKCHIP=y
-+CONFIG_RAM_RK3399_LPDDR4=y
+CONFIG_RAM_ROCKCHIP_LPDDR4=y
 +CONFIG_BAUDRATE=1500000
 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
 +CONFIG_SYSRESET=y
 +CONFIG_USB=y
 +CONFIG_USB_XHCI_HCD=y
 +CONFIG_USB_XHCI_DWC3=y
 +CONFIG_USB_EHCI_HCD=y
 +CONFIG_USB_EHCI_GENERIC=y
-+CONFIG_USB_KEYBOARD=y
 +CONFIG_USB_HOST_ETHER=y
 +CONFIG_USB_ETHER_ASIX=y
 +CONFIG_USB_ETHER_ASIX88179=y
 +CONFIG_USB_ETHER_MCS7830=y
 +CONFIG_USB_ETHER_RTL8152=y
 +CONFIG_USB_ETHER_SMSC95XX=y
-+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO=y
 +CONFIG_DISPLAY=y
 +CONFIG_VIDEO_ROCKCHIP=y
 +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
--- a/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-Add-support-for-Rocktech-MPC1903.patch
+++ b/package/boot/uboot-rockchip/patches/307-rockchip-rk3399-Add-support-for-Rocktech-MPC1903.patch
@ -718,23 +718,33 @@
 +};
 --- /dev/null
 +++ b/configs/rocktech-mpc1903-rk3399_defconfig
-@@ -0,0 +1,63 @@
+@@ -0,0 +1,72 @@
 +CONFIG_ARM=y
 +CONFIG_SKIP_LOWLEVEL_INIT=y
 +CONFIG_COUNTER_FREQUENCY=24000000
 +CONFIG_ARCH_ROCKCHIP=y
 +CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 +CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-mpc1903"
 +CONFIG_ROCKCHIP_RK3399=y
 +CONFIG_TARGET_EVB_RK3399=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_SPL_STACK=0x400000
 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
 +CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
 +CONFIG_DEBUG_UART=y
 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-mpc1903.dtb"
 +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 +CONFIG_SPL_STACK_R=y
 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 +CONFIG_TPL=y
@ -745,7 +755,6 @@
 +# CONFIG_CMD_SETEXPR is not set
 +CONFIG_CMD_TIME=y
 +CONFIG_SPL_OF_CONTROL=y
-+CONFIG_DEFAULT_DEVICE_TREE="rk3399-mpc1903"
 +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 +CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@ -755,7 +764,6 @@
 +CONFIG_MMC_DW_ROCKCHIP=y
 +CONFIG_MMC_SDHCI=y
 +CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_ETH=y
 +CONFIG_ETH_DESIGNWARE=y
 +CONFIG_GMAC_ROCKCHIP=y
 +CONFIG_PMIC_RK8XX=y
@ -764,6 +772,7 @@
 +CONFIG_PWM_ROCKCHIP=y
 +CONFIG_BAUDRATE=1500000
 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
 +CONFIG_SYSRESET=y
 +CONFIG_USB=y
 +CONFIG_USB_XHCI_HCD=y
@ -776,7 +785,7 @@
 +CONFIG_USB_ETHER_MCS7830=y
 +CONFIG_USB_ETHER_RTL8152=y
 +CONFIG_USB_ETHER_SMSC95XX=y
-+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO=y
 +CONFIG_DISPLAY=y
 +CONFIG_VIDEO_ROCKCHIP=y
 +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
--- a/package/boot/uboot-rockchip/patches/308-rockchip-rk3399-Add-support-for-sharevdi-h3399pc.patch
+++ b/package/boot/uboot-rockchip/patches/308-rockchip-rk3399-Add-support-for-sharevdi-h3399pc.patch
@ -858,23 +858,33 @@
 +};
 --- /dev/null
 +++ b/configs/sharevdi-h3399pc-rk3399_defconfig
-@@ -0,0 +1,63 @@
+@@ -0,0 +1,72 @@
 +CONFIG_ARM=y
 +CONFIG_SKIP_LOWLEVEL_INIT=y
 +CONFIG_COUNTER_FREQUENCY=24000000
 +CONFIG_ARCH_ROCKCHIP=y
 +CONFIG_TEXT_BASE=0x00200000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
+CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000
 +CONFIG_ENV_OFFSET=0x3F8000
+CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
 +CONFIG_ROCKCHIP_RK3399=y
 +CONFIG_TARGET_EVB_RK3399=y
-+CONFIG_NR_DRAM_BANKS=1
-+CONFIG_SYS_LOAD_ADDR=0x800800
+CONFIG_SPL_STACK=0x400000
 +CONFIG_DEBUG_UART_BASE=0xFF1A0000
 +CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_SYS_LOAD_ADDR=0x800800
 +CONFIG_DEBUG_UART=y
 +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-h3399pc.dtb"
 +CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x2e000
+CONFIG_SPL_PAD_TO=0x7f8000
+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
+CONFIG_SPL_BSS_START_ADDR=0x400000
+CONFIG_SPL_BSS_MAX_SIZE=0x2000
 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set
 +CONFIG_SPL_STACK_R=y
 +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000
 +CONFIG_TPL=y
@ -885,7 +895,6 @@
 +# CONFIG_CMD_SETEXPR is not set
 +CONFIG_CMD_TIME=y
 +CONFIG_SPL_OF_CONTROL=y
-+CONFIG_DEFAULT_DEVICE_TREE="rk3399-h3399pc"
 +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
 +CONFIG_ENV_IS_IN_MMC=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@ -895,7 +904,6 @@
 +CONFIG_MMC_DW_ROCKCHIP=y
 +CONFIG_MMC_SDHCI=y
 +CONFIG_MMC_SDHCI_ROCKCHIP=y
-+CONFIG_DM_ETH=y
 +CONFIG_ETH_DESIGNWARE=y
 +CONFIG_GMAC_ROCKCHIP=y
 +CONFIG_PMIC_RK8XX=y
@ -904,6 +912,7 @@
 +CONFIG_PWM_ROCKCHIP=y
 +CONFIG_BAUDRATE=1500000
 +CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
 +CONFIG_SYSRESET=y
 +CONFIG_USB=y
 +CONFIG_USB_XHCI_HCD=y
@ -916,10 +925,9 @@
 +CONFIG_USB_ETHER_MCS7830=y
 +CONFIG_USB_ETHER_RTL8152=y
 +CONFIG_USB_ETHER_SMSC95XX=y
-+CONFIG_DM_VIDEO=y
+CONFIG_VIDEO=y
 +CONFIG_DISPLAY=y
 +CONFIG_VIDEO_ROCKCHIP=y
 +CONFIG_DISPLAY_ROCKCHIP_HDMI=y
 +CONFIG_SPL_TINY_MEMSET=y
 +CONFIG_ERRNO_STR=y
-
--- a/package/boot/uboot-rockchip/patches/309-rockchip-rk3399-Add-support-for-ScenSmart-SV901.patch
+++ b/package/boot/uboot-rockchip/patches/309-rockchip-rk3399-Add-support-for-ScenSmart-SV901.patch
--- a/package/firmware/linux-firmware/broadcom.mk
+++ b/package/firmware/linux-firmware/broadcom.mk
@ -136,3 +136,11 @@ define Package/rongpin-king3399-firmware/install
 	$(INSTALL_DATA) ./brcm_firmware/ap6356s/brcmfmac4356-sdio.rongpin,king3399.txt $(1)/lib/firmware/brcm/brcmfmac4356-sdio.rongpin,king3399.txt
 endef
 $(eval $(call BuildPackage,rongpin-king3399-firmware))
+
+Package/scensmart-sv901-firmware = $(call Package/firmware-default,Broadcom FullMac SDIO firmware)
+define Package/scensmart-sv901-firmware/install
+	$(INSTALL_DIR) $(1)/lib/firmware/brcm
+	$(INSTALL_DATA) ./brcm_firmware/ap6356s/brcmfmac4356-sdio.rongpin,king3399.bin $(1)/lib/firmware/brcm/brcmfmac4356-sdio.scensmart,sv901.bin
+	$(INSTALL_DATA) ./brcm_firmware/ap6356s/brcmfmac4356-sdio.rongpin,king3399.txt $(1)/lib/firmware/brcm/brcmfmac4356-sdio.scensmart,sv901.txt
+endef
+$(eval $(call BuildPackage,scensmart-sv901-firmware))
--- a/package/libs/libcap/Makefile
+++ b/package/libs/libcap/Makefile
@ -6,12 +6,12 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=libcap
-PKG_VERSION:=2.67
+PKG_VERSION:=2.68
 PKG_RELEASE:=1

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@KERNEL/linux/libs/security/linux-privs/libcap2
-PKG_HASH:=ce9b22fdc271beb6dae7543da5f74cf24cb82e6848cfd088a5a069dec5ea5198
+PKG_HASH:=90be3b6d41be5f81ae4b03ec76012b0d27c829293684f6c05b65d5f9cce724b2

 PKG_MAINTAINER:=Paul Wassi <p.wassi@gmx.at>
 PKG_LICENSE:=GPL-2.0-only
--- a/package/libs/mbedtls/Makefile
+++ b/package/libs/mbedtls/Makefile
@ -8,13 +8,13 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=mbedtls
-PKG_VERSION:=2.28.2
+PKG_VERSION:=2.28.3
 PKG_RELEASE:=1
 PKG_USE_MIPS16:=0

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://codeload.github.com/ARMmbed/mbedtls/tar.gz/v$(PKG_VERSION)?
-PKG_HASH:=bc55232bf71fd66045122ba9050a29ea7cb2e8f99b064a9e6334a82f715881a0
+PKG_HASH:=bdf7c5bbdc338da3edad89b2885d4f8668f9a6fffeba6ec17a60333e36dade6f

 PKG_LICENSE:=GPL-2.0-or-later
 PKG_LICENSE_FILES:=gpl-2.0.txt
--- a/package/libs/mbedtls/patches/100-fix-compile.patch
+++ b/package/libs/mbedtls/patches/100-fix-compile.patch
@ -1,22 +0,0 @@
-Fix a compile problem introduced in commit 331c3421d1f0 ("Address review comments")
-
-Bug report: https://github.com/Mbed-TLS/mbedtls/issues/6243
-
--- a/programs/ssl/ssl_server2.c
-+++ b/programs/ssl/ssl_server2.c
-@@ -2529,7 +2529,6 @@ int main( int argc, char *argv[] )
-         }
-         key_cert_init2 = 2;
- #endif /* MBEDTLS_ECDSA_C */
-    }
- 
- #if defined(MBEDTLS_USE_PSA_CRYPTO)
-     if( opt.key_opaque != 0 )
-@@ -2558,6 +2557,7 @@ int main( int argc, char *argv[] )
-     }
- #endif /* MBEDTLS_USE_PSA_CRYPTO */
- #endif /* MBEDTLS_CERTS_C */
-+    }
- 
-     mbedtls_printf( " ok (key types: %s - %s)\n", mbedtls_pk_get_name( &pkey ), mbedtls_pk_get_name( &pkey2 ) );
- #endif /* MBEDTLS_KEY_EXCHANGE_WITH_CERT_ENABLED */
--- a/package/libs/mbedtls/patches/100-x509-crt-verify-SAN-iPAddress.patch
+++ b/package/libs/mbedtls/patches/100-x509-crt-verify-SAN-iPAddress.patch
@ -0,0 +1,197 @@
+From eb9d4fdf1846e688d51d86a9a50f0312aca2af25 Mon Sep 17 00:00:00 2001
+From: Glenn Strauss <gstrauss@gluelogic.com>
+Date: Sun, 23 Oct 2022 19:48:18 -0400
+Subject: [PATCH] x509 crt verify SAN iPAddress
+
+Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>
+---
+ include/mbedtls/x509_crt.h |   2 +-
+ library/x509_crt.c         | 126 ++++++++++++++++++++++++++++++-------
+ 2 files changed, 103 insertions(+), 25 deletions(-)
+
+--- a/include/mbedtls/x509_crt.h
+++ b/include/mbedtls/x509_crt.h
+@@ -608,7 +608,7 @@ int mbedtls_x509_crt_verify_info(char *b
+  * \param cn       The expected Common Name. This will be checked to be
+  *                 present in the certificate's subjectAltNames extension or,
+  *                 if this extension is absent, as a CN component in its
+- *                 Subject name. Currently only DNS names are supported. This
+ *                 Subject name. DNS names and IP addresses are supported. This
+  *                 may be \c NULL if the CN need not be verified.
+  * \param flags    The address at which to store the result of the verification.
+  *                 If the verification couldn't be completed, the flag value is
+--- a/library/x509_crt.c
+++ b/library/x509_crt.c
+@@ -57,6 +57,10 @@
+ 
+ #if defined(MBEDTLS_HAVE_TIME)
+ #if defined(_WIN32) && !defined(EFIX64) && !defined(EFI32)
+#define WIN32_LEAN_AND_MEAN
+#ifndef _WIN32_WINNT
+#define _WIN32_WINNT 0x0600
+#endif
+ #include <windows.h>
+ #else
+ #include <time.h>
+@@ -2995,6 +2999,61 @@ find_parent:
+     }
+ }
+ 
+#ifdef _WIN32
+#ifdef _MSC_VER
+#pragma comment(lib, "ws2_32.lib")
+#include <winsock2.h>
+#include <ws2tcpip.h>
+#elif (defined(__MINGW32__) || defined(__MINGW64__)) && _WIN32_WINNT >= 0x0600
+#include <winsock2.h>
+#include <ws2tcpip.h>
+#endif
+#elif defined(__sun)
+/* Solaris requires -lsocket -lnsl for inet_pton() */
+#elif defined(__has_include)
+#if __has_include(<sys/socket.h>)
+#include <sys/socket.h>
+#endif
+#if __has_include(<arpa/inet.h>)
+#include <arpa/inet.h>
+#endif
+#endif
+
+/* Use whether or not AF_INET6 is defined to indicate whether or not to use
+ * the platform inet_pton() or a local implementation (below).  The local
+ * implementation may be used even in cases where the platform provides
+ * inet_pton(), e.g. when there are different includes required and/or the
+ * platform implementation requires dependencies on additional libraries.
+ * Specifically, Windows requires custom includes and additional link
+ * dependencies, and Solaris requires additional link dependencies.
+ * Also, as a coarse heuristic, use the local implementation if the compiler
+ * does not support __has_include(), or if the definition of AF_INET6 is not
+ * provided by headers included (or not) via __has_include() above. */
+#ifndef AF_INET6
+
+#define x509_cn_inet_pton(cn, dst) (0)
+
+#else
+
+static int x509_inet_pton_ipv6(const char *src, void *dst)
+{
+    return inet_pton(AF_INET6, src, dst) == 1 ? 0 : -1;
+}
+
+static int x509_inet_pton_ipv4(const char *src, void *dst)
+{
+    return inet_pton(AF_INET, src, dst) == 1 ? 0 : -1;
+}
+
+#endif /* AF_INET6 */
+
+static size_t x509_cn_inet_pton(const char *cn, void *dst)
+{
+    return strchr(cn, ':') == NULL
+            ? x509_inet_pton_ipv4(cn, dst) == 0 ? 4 : 0
+            : x509_inet_pton_ipv6(cn, dst) == 0 ? 16 : 0;
+}
+
+ /*
+  * Check for CN match
+  */
+@@ -3015,24 +3074,51 @@ static int x509_crt_check_cn(const mbedt
+     return -1;
+ }
+ 
+static int x509_crt_check_san_ip(const mbedtls_x509_sequence *san,
+                                 const char *cn, size_t cn_len)
+{
+    uint32_t ip[4];
+    cn_len = x509_cn_inet_pton(cn, ip);
+    if (cn_len == 0) {
+        return -1;
+    }
+
+    for (const mbedtls_x509_sequence *cur = san; cur != NULL; cur = cur->next) {
+        const unsigned char san_type = (unsigned char) cur->buf.tag &
+                                       MBEDTLS_ASN1_TAG_VALUE_MASK;
+        if (san_type == MBEDTLS_X509_SAN_IP_ADDRESS &&
+            cur->buf.len == cn_len && memcmp(cur->buf.p, ip, cn_len) == 0) {
+            return 0;
+        }
+    }
+
+    return -1;
+}
+
+ /*
+  * Check for SAN match, see RFC 5280 Section 4.2.1.6
+  */
+-static int x509_crt_check_san(const mbedtls_x509_buf *name,
+static int x509_crt_check_san(const mbedtls_x509_sequence *san,
+                               const char *cn, size_t cn_len)
+ {
+-    const unsigned char san_type = (unsigned char) name->tag &
+-                                   MBEDTLS_ASN1_TAG_VALUE_MASK;
+-
+-    /* dNSName */
+-    if (san_type == MBEDTLS_X509_SAN_DNS_NAME) {
+-        return x509_crt_check_cn(name, cn, cn_len);
+    int san_ip = 0;
+    for (const mbedtls_x509_sequence *cur = san; cur != NULL; cur = cur->next) {
+        switch ((unsigned char) cur->buf.tag & MBEDTLS_ASN1_TAG_VALUE_MASK) {
+            case MBEDTLS_X509_SAN_DNS_NAME:                /* dNSName */
+                if (x509_crt_check_cn(&cur->buf, cn, cn_len) == 0) {
+                    return 0;
+                }
+                break;
+            case MBEDTLS_X509_SAN_IP_ADDRESS:              /* iPAddress */
+                san_ip = 1;
+                break;
+            /* (We may handle other types here later.) */
+            default: /* Unrecognized type */
+                break;
+        }
+     }
+ 
+-    /* (We may handle other types here later.) */
+-
+-    /* Unrecognized type */
+-    return -1;
+    return san_ip ? x509_crt_check_san_ip(san, cn, cn_len) : -1;
+ }
+ 
+ /*
+@@ -3043,31 +3129,23 @@ static void x509_crt_verify_name(const m
+                                  uint32_t *flags)
+ {
+     const mbedtls_x509_name *name;
+-    const mbedtls_x509_sequence *cur;
+     size_t cn_len = strlen(cn);
+ 
+     if (crt->ext_types & MBEDTLS_X509_EXT_SUBJECT_ALT_NAME) {
+-        for (cur = &crt->subject_alt_names; cur != NULL; cur = cur->next) {
+-            if (x509_crt_check_san(&cur->buf, cn, cn_len) == 0) {
+-                break;
+-            }
+-        }
+-
+-        if (cur == NULL) {
+-            *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+        if (x509_crt_check_san(&crt->subject_alt_names, cn, cn_len) == 0) {
+            return;
+         }
+     } else {
+         for (name = &crt->subject; name != NULL; name = name->next) {
+             if (MBEDTLS_OID_CMP(MBEDTLS_OID_AT_CN, &name->oid) == 0 &&
+                 x509_crt_check_cn(&name->val, cn, cn_len) == 0) {
+-                break;
+                return;
+             }
+         }
+ 
+-        if (name == NULL) {
+-            *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+-        }
+     }
+
+    *flags |= MBEDTLS_X509_BADCERT_CN_MISMATCH;
+ }
+ 
+ /*
--- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c
+++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.c
@ -256,7 +256,7 @@ static int __rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)

 int __rtl8366_mdio_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
 {
-	u32 phy_id = MDC_REALTEK_PHY_ADDR;
+	u32 phy_id = smi->phy_id ? smi->phy_id : MDC_REALTEK_PHY_ADDR;
 	struct mii_bus *mbus = smi->ext_mbus;

 	BUG_ON(in_interrupt());
@ -293,7 +293,7 @@ int __rtl8366_mdio_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)

 static int __rtl8366_mdio_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
 {
-	u32 phy_id = MDC_REALTEK_PHY_ADDR;
+	u32 phy_id = smi->phy_id ? smi->phy_id : MDC_REALTEK_PHY_ADDR;
 	struct mii_bus *mbus = smi->ext_mbus;

 	BUG_ON(in_interrupt());
--- a/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h
+++ b/target/linux/generic/files/drivers/net/phy/rtl8366_smi.h
@ -64,6 +64,7 @@ struct rtl8366_smi {
 	u8			dbg_vlan_4k_page;
 #endif
 	struct mii_bus		*ext_mbus;
+	u32			phy_id;
 };

 struct rtl8366_vlan_mc {
--- a/target/linux/generic/files/drivers/net/phy/rtl8367b.c
+++ b/target/linux/generic/files/drivers/net/phy/rtl8367b.c
@ -213,6 +213,23 @@
 #define RTL8367B_RTL_MAGIC_ID_REG		0x13c2
 #define   RTL8367B_RTL_MAGIC_ID_VAL		0x0249

+#define RTL8367S_EXT_TXC_DLY_REG		0x13f9
+#define   RTL8367S_EXT1_GMII_TX_DELAY_SHIFT	12
+#define   RTL8367S_EXT0_GMII_TX_DELAY_SHIFT	9
+#define   RTL8367S_EXT_GMII_TX_DELAY_MASK	GENMASK(2,0)
+
+#define RTL8367S_SDS_MISC				0x1d11
+#define   RTL8367S_CFG_SGMII_RXFC		BIT(14)
+#define   RTL8367S_CFG_SGMII_TXFC		BIT(13)
+#define   RTL8367S_CFG_MAC8_SEL_HSGMII_SHIFT	11
+#define   RTL8367S_CFG_MAC8_SEL_HSGMII_MASK	BIT(11)
+#define   RTL8367S_CFG_SGMII_FDUP		BIT(10)
+#define   RTL8367S_CFG_SGMII_LINK		BIT(9)
+#define   RTL8367S_CFG_SGMII_SPD_SHIFT		7
+#define   RTL8367S_CFG_SGMII_SPD_MASK		GENMASK(8,7)
+#define   RTL8367S_CFG_MAC8_SEL_SGMII		BIT(6)
+
+
 #define RTL8367B_IA_CTRL_REG			0x1f00
 #define   RTL8367B_IA_CTRL_RW(_x)		((_x) << 1)
 #define   RTL8367B_IA_CTRL_RW_READ		RTL8367B_IA_CTRL_RW(0)
@ -230,9 +247,18 @@

 #define RTL8367B_INTERNAL_PHY_REG(_a, _r)	(0x2000 + 32 * (_a) + (_r))

+/* SerDes indirect access */
+#define RTL8367S_SDS_INDACS_CMD_REG		0x6600
+#define RTL8367S_SDS_CMD			BIT(7)
+#define RTL8367S_SDS_RWOP			BIT(6)
+#define RTL8367S_SDS_INDACS_ADDR_REG		0x6601
+#define RTL8367S_SDS_INDACS_DATA_REG		0x6602
+
 #define RTL8367B_NUM_MIB_COUNTERS	58

+#define RTL8367S_PHY_ADDR		29
 #define RTL8367B_CPU_PORT_NUM		5
+#define RTL8367S_CPU_PORT_NUM		7
 #define RTL8367B_NUM_PORTS		8
 #define RTL8367B_NUM_VLANS		32
 #define RTL8367B_NUM_VIDS		4096
@ -255,14 +281,16 @@

 #define RTL8367B_PORTS_ALL_BUT_CPU				\
 	(RTL8367B_PORT_0 | RTL8367B_PORT_1 | RTL8367B_PORT_2 |	\
-	 RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E1 |	\
-	 RTL8367B_PORT_E2)
+	 RTL8367B_PORT_3 | RTL8367B_PORT_4 | RTL8367B_PORT_E0 |	\
+	 RTL8367B_PORT_E1)

 struct rtl8367b_initval {
 	u16 reg;
 	u16 val;
 };

+u32 rtl_device_id;
+
 #define RTL8367B_MIB_RXB_ID		0	/* IfInOctets */
 #define RTL8367B_MIB_TXB_ID		28	/* IfOutOctets */

@ -605,6 +633,45 @@ static const struct rtl8367b_initval rtl8367r_vb_initvals_1[] = {
 	{0x133E, 0x000E}, {0x133F, 0x0010},
 };

+static const struct rtl8367b_initval rtl8367c_initvals0[] = {
+	{0x13c2, 0x0000}, {0x0018, 0x0f00}, {0x0038, 0x0f00}, {0x0058, 0x0f00},
+	{0x0078, 0x0f00}, {0x0098, 0x0f00}, {0x1d15, 0x0a69}, {0x2000, 0x1340},
+	{0x2020, 0x1340}, {0x2040, 0x1340}, {0x2060, 0x1340}, {0x2080, 0x1340},
+	{0x13eb, 0x15bb}, {0x1303, 0x06d6}, {0x1304, 0x0700}, {0x13E2, 0x003F},
+	{0x13F9, 0x0090}, {0x121e, 0x03CA}, {0x1233, 0x0352}, {0x1237, 0x00a0},
+	{0x123a, 0x0030}, {0x1239, 0x0084}, {0x0301, 0x1000}, {0x1349, 0x001F},
+	{0x18e0, 0x4004}, {0x122b, 0x641c}, {0x1305, 0xc000}, {0x1200, 0x7fcb},
+	{0x0884, 0x0003}, {0x06eb, 0x0001}, {0x00cf, 0xffff}, {0x00d0, 0x0007},
+	{0x00ce, 0x48b0}, {0x00ce, 0x48b0}, {0x0398, 0xffff}, {0x0399, 0x0007},
+	{0x0300, 0x0001}, {0x03fa, 0x0007}, {0x08c8, 0x00c0}, {0x0a30, 0x020e},
+	{0x0800, 0x0000}, {0x0802, 0x0000}, {0x09da, 0x0017}, {0x1d32, 0x0002},
+};
+static const struct rtl8367b_initval rtl8367s_initvals[] = {
+/* Special init for RTL8367SB in RGMII mode with some comments */
+/* phy port eee init */
+{0x0018, 0x0f00}, {0x1d15, 0x0a69}, {0x2014, 0x0000}, {0x2708, 0x0006},
+{0x0038, 0x0f00}, {0x1d15, 0x0a69}, {0x2034, 0x0000}, {0x2748, 0x0006},
+{0x0058, 0x0f00}, {0x1d15, 0x0a69}, {0x2054, 0x0000}, {0x2748, 0x0006},
+{0x0078, 0x0f00}, {0x1d15, 0x0a69}, {0x2074, 0x0000}, {0x2768, 0x0006},
+{0x0018, 0x0f00}, {0x1d15, 0x0a69}, {0x2094, 0x0000}, {0x2788, 0x0006},
+/* enable phy 0-4 - after reset phy is disabled */
+{0x1d15, 0x0a69}, {0x2000, 0x1340}, {0x2020, 0x1340}, {0x2040, 0x1340},
+{0x2060, 0x1340}, {0x2080, 0x1340},
+/* standard init */
+{0x13eb, 0x15bb}, {0x1303, 0x06d6}, {0x1304, 0x0700}, {0x13E2, 0x003F},
+{0x13F9, 0x0090},
+/* add init extended interface2 mode == rgmii explicitly */
+{0x1303, 0x0767}, {0x1304, 0x7777}, {0x1305, 0xc000}, {0x13E2, 0x01fd},
+{0x13c3, 0x0001}, {0x13c4, 0x1076}, {0x13c5, 0x000a},
+/*end init ext2 mode*/
+{0x121e, 0x03CA}, {0x1233, 0x0352}, {0x1237, 0x00a0}, {0x123a, 0x0030},
+{0x1239, 0x0084}, {0x0301, 0x1000}, {0x1349, 0x001F}, {0x18e0, 0x4004},
+{0x122b, 0x641c}, {0x1305, 0xc000}, {0x1200, 0x7fcb}, {0x0884, 0x0003},
+{0x06eb, 0x0001}, {0x00cf, 0xffff}, {0x00d0, 0x0007}, {0x00ce, 0x48b0},
+{0x0398, 0xffff}, {0x0399, 0x0007}, {0x0300, 0x0001}, {0x03fa, 0x0007},
+{0x08c8, 0x00c0}, {0x0a30, 0x020e}, {0x0800, 0x0000}, {0x0802, 0x0000},
+{0x09da, 0x0017}, {0x1d32, 0x0002}, {0x13c2, 0x0000}, 
+};
 static int rtl8367b_write_initvals(struct rtl8366_smi *smi,
 				  const struct rtl8367b_initval *initvals,
 				  int count)
@ -612,6 +679,10 @@ static int rtl8367b_write_initvals(struct rtl8366_smi *smi,
 	int err;
 	int i;

+	if (rtl_device_id == 0x0020) {
+		return 0;
+	}
+
 	for (i = 0; i < count; i++)
 		REG_WR(smi, initvals[i].reg, initvals[i].val);

@ -727,6 +798,11 @@ static int rtl8367b_init_regs(struct rtl8366_smi *smi)
 	rlvid = (chip_ver >> RTL8367B_CHIP_VER_RLVID_SHIFT) &
 		RTL8367B_CHIP_VER_RLVID_MASK;

+	if (of_device_is_compatible(smi->parent->of_node,
+				    "realtek,rtl8367s")) {
+		initvals = rtl8367c_initvals0;
+		count = ARRAY_SIZE(rtl8367c_initvals0);
+	} else {
 	switch (rlvid) {
 	case 0:
 		initvals = rtl8367r_vb_initvals_0;
@ -742,6 +818,7 @@ static int rtl8367b_init_regs(struct rtl8366_smi *smi)
 		dev_err(smi->parent, "unknow rlvid %u\n", rlvid);
 		return -ENODEV;
 	}
+	}

 	/* TODO: disable RLTP */

@ -779,7 +856,45 @@ static int rtl8367b_reset_chip(struct rtl8366_smi *smi)
 static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id,
 				   enum rtl8367_extif_mode mode)
 {
-	int err;
+	int err, i;
+	/* for SGMII, works (from rtl8367s_api.c in TL-R600VPN v4 GPL) */
+	unsigned int redData[][2] = {
+		{0x7180, 0x2},
+		{0x04D7, 0x0480},
+		{0xF994, 0x0481},
+		{0x31A2, 0x0482},
+		{0x6960, 0x0483},
+		{0x9728, 0x0484},
+		{0x9D85, 0x0423},
+		{0xD810, 0x0424},
+		{0x0F80, 0x0001}
+	};
+
+	/*
+	 * for HSGMII, works
+	 * (from rtl8367c_asicdrv_port.c in TL-R600VPN v4 GPL,
+	 * based on redDataHB and customized like redData)
+	 */
+	unsigned int redDataH[][2] = {
+		{0x7180, 0x2},
+		{0x82F0, 0x0500},
+		{0xF195, 0x0501},
+		{0x31A2, 0x0502},
+		{0x7960, 0x0503},
+		{0x9728, 0x0504},
+		{0x9D85, 0x0423},
+		{0xD810, 0x0424},
+		{0x0F80, 0x0001},
+		{0x83F2, 0x002E}
+	};
+
+	if ((mode == RTL8367S_EXTIF_MODE_SGMII ||
+	     mode == RTL8367S_EXTIF_MODE_HSGMII)
+	     && id != RTL8367_EXTIF1) {
+		dev_err(smi->parent,
+			"SGMII/HSGMII mode is only available in extif1\n");
+		return -EINVAL;
+	}

 	/* set port mode */
 	switch (mode) {
@ -787,7 +902,7 @@ static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id,
 		REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG,
 			RTL8367B_DEBUG0_SEL33(id),
 			RTL8367B_DEBUG0_SEL33(id));
-		if (id <= 1) {
+		if (id <= RTL8367_EXTIF1) {
 			REG_RMW(smi, RTL8367B_CHIP_DEBUG0_REG,
 				RTL8367B_DEBUG0_DRI(id) |
 					RTL8367B_DEBUG0_DRI_RG(id) |
@ -823,6 +938,17 @@ static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id,
 			RTL8367B_DEBUG0_SEL33(id),
 			RTL8367B_DEBUG0_SEL33(id));
 		REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), BIT(6));
+
+		if (of_device_is_compatible(smi->parent->of_node,
+					    "realtek,rtl8367s")) {
+			REG_RMW(smi, RTL8367S_EXT_TXC_DLY_REG,
+				RTL8367S_EXT_GMII_TX_DELAY_MASK
+					<< RTL8367S_EXT1_GMII_TX_DELAY_SHIFT |
+				RTL8367S_EXT_GMII_TX_DELAY_MASK
+					<< RTL8367S_EXT0_GMII_TX_DELAY_SHIFT,
+				5 << RTL8367S_EXT1_GMII_TX_DELAY_SHIFT |	/* shoud be configured */
+				6 << RTL8367S_EXT0_GMII_TX_DELAY_SHIFT);	/* in set_rgmii_delay? */
+		}
 		break;

 	case RTL8367_EXTIF_MODE_MII_MAC:
@ -832,13 +958,49 @@ static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id,
 		REG_RMW(smi, RTL8367B_EXT_RGMXF_REG(id), BIT(6), 0);
 		break;

+	case RTL8367S_EXTIF_MODE_SGMII:
+		if (!of_device_is_compatible(smi->parent->of_node,
+					     "realtek,rtl8367s"))
+			goto invalid_mode;
+
+		/* setup SerDes register for SGMII */
+		for (i = 0; i <= 7; i++) {
+			REG_WR(smi, RTL8367S_SDS_INDACS_DATA_REG, redData[i][0]);
+			REG_WR(smi, RTL8367S_SDS_INDACS_ADDR_REG, redData[i][1]);
+			REG_WR(smi, RTL8367S_SDS_INDACS_CMD_REG,
+				RTL8367S_SDS_CMD | RTL8367S_SDS_RWOP);
+		}
+		break;
+
+	case RTL8367S_EXTIF_MODE_HSGMII:
+		if (!of_device_is_compatible(smi->parent->of_node,
+					     "realtek,rtl8367s"))
+			goto invalid_mode;
+
+		/* setup SerDes register for HSGMII */
+		for (i = 0; i <= 8; i++) {
+			REG_WR(smi, RTL8367S_SDS_INDACS_DATA_REG, redDataH[i][0]);
+			REG_WR(smi, RTL8367S_SDS_INDACS_ADDR_REG, redDataH[i][1]);
+			REG_WR(smi, RTL8367S_SDS_INDACS_CMD_REG,
+				RTL8367S_SDS_CMD | RTL8367S_SDS_RWOP);
+		}
+		break;
+
 	default:
-		dev_err(smi->parent,
-			"invalid mode for external interface %d\n", id);
-		return -EINVAL;
+		goto invalid_mode;
 	}

-	if (id <= 1)
+	if (id == RTL8367_EXTIF1 &&
+	    of_device_is_compatible(smi->parent->of_node, "realtek,rtl8367s")) {
+		REG_RMW(smi, RTL8367S_SDS_MISC,	RTL8367S_CFG_MAC8_SEL_HSGMII_MASK,
+			(mode == RTL8367S_EXTIF_MODE_HSGMII)
+				? RTL8367S_CFG_MAC8_SEL_HSGMII_MASK : 0);
+		REG_RMW(smi, RTL8367S_SDS_MISC,	RTL8367S_CFG_MAC8_SEL_SGMII,
+			(mode == RTL8367S_EXTIF_MODE_SGMII)
+				? RTL8367S_CFG_MAC8_SEL_SGMII : 0);
+	}
+
+	if (id <= RTL8367_EXTIF1)
 		REG_RMW(smi, RTL8367B_DIS_REG,
 			RTL8367B_DIS_RGMII_MASK << RTL8367B_DIS_RGMII_SHIFT(id),
 			mode << RTL8367B_DIS_RGMII_SHIFT(id));
@ -847,7 +1009,20 @@ static int rtl8367b_extif_set_mode(struct rtl8366_smi *smi, int id,
 			RTL8367B_DIS2_RGMII_MASK << RTL8367B_DIS2_RGMII_SHIFT,
 			mode << RTL8367B_DIS2_RGMII_SHIFT);

+	if (mode == RTL8367S_EXTIF_MODE_SGMII ||
+	    mode == RTL8367S_EXTIF_MODE_HSGMII) {
+		REG_WR(smi, RTL8367S_SDS_INDACS_DATA_REG, 0x7106);
+		REG_WR(smi, RTL8367S_SDS_INDACS_ADDR_REG, 0x0003);
+		REG_WR(smi, RTL8367S_SDS_INDACS_CMD_REG,
+				RTL8367S_SDS_CMD | RTL8367S_SDS_RWOP);
+	}
+
 	return 0;
+
+invalid_mode:
+	dev_err(smi->parent,
+		"invalid mode for external interface %d\n", id);
+	return -EINVAL;
 }

 static int rtl8367b_extif_set_force(struct rtl8366_smi *smi, int id,
@ -857,6 +1032,20 @@ static int rtl8367b_extif_set_force(struct rtl8366_smi *smi, int id,
 	u32 val;
 	int err;

+	if (id == RTL8367_EXTIF1 &&
+	    of_device_is_compatible(smi->parent->of_node, "realtek,rtl8367s")) {
+		REG_RMW(smi, RTL8367S_SDS_MISC, RTL8367S_CFG_SGMII_FDUP,
+			pa->duplex ? RTL8367S_CFG_SGMII_FDUP : 0);
+		REG_RMW(smi, RTL8367S_SDS_MISC, RTL8367S_CFG_SGMII_SPD_MASK,
+			pa->speed << RTL8367S_CFG_SGMII_SPD_SHIFT);
+		REG_RMW(smi, RTL8367S_SDS_MISC, RTL8367S_CFG_SGMII_LINK,
+			pa->link ? RTL8367S_CFG_SGMII_LINK : 0);
+		REG_RMW(smi, RTL8367S_SDS_MISC, RTL8367S_CFG_SGMII_TXFC,
+			pa->txpause ? RTL8367S_CFG_SGMII_TXFC : 0);
+		REG_RMW(smi, RTL8367S_SDS_MISC, RTL8367S_CFG_SGMII_RXFC,
+			pa->rxpause ? RTL8367S_CFG_SGMII_RXFC : 0);
+	}
+
 	mask = (RTL8367B_DI_FORCE_MODE |
 		RTL8367B_DI_FORCE_NWAY |
 		RTL8367B_DI_FORCE_TXPAUSE |
@ -918,6 +1107,15 @@ static int rtl8367b_extif_init(struct rtl8366_smi *smi, int id,
 						     cfg->rxdelay);
 		if (err)
 			return err;
+
+		if (of_device_is_compatible(smi->parent->of_node,
+					    "realtek,rtl8367s")) {
+			/* disable pre-emphasis */
+			REG_WR(smi, RTL8367S_SDS_INDACS_DATA_REG, 0x28A0);
+			REG_WR(smi, RTL8367S_SDS_INDACS_ADDR_REG, 0x0482);
+			REG_WR(smi, RTL8367S_SDS_INDACS_CMD_REG,
+					RTL8367S_SDS_CMD | RTL8367S_SDS_RWOP);
+		}
 	}

 	return 0;
@ -928,6 +1126,7 @@ static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
 				  const char *name)
 {
 	struct rtl8367_extif_config *cfg;
+	enum rtl8367_port_speed speed;
 	const __be32 *prop;
 	int size;
 	int err;
@ -953,7 +1152,11 @@ static int rtl8367b_extif_init_of(struct rtl8366_smi *smi, int id,
 	cfg->ability.rxpause = be32_to_cpup(prop++);
 	cfg->ability.link = be32_to_cpup(prop++);
 	cfg->ability.duplex = be32_to_cpup(prop++);
-	cfg->ability.speed = be32_to_cpup(prop++);
+	speed = be32_to_cpup(prop++);
+	if (of_device_is_compatible(smi->parent->of_node, "realtek,rtl8367s") &&
+	    cfg->mode == RTL8367S_EXTIF_MODE_HSGMII)
+		speed = RTL8367_PORT_SPEED_1000;
+	cfg->ability.speed = speed;

 	err = rtl8367b_extif_init(smi, id, cfg);
 	kfree(cfg);
@ -982,23 +1185,28 @@ static int rtl8367b_setup(struct rtl8366_smi *smi)

 	/* initialize external interfaces */
 	if (smi->parent->of_node) {
-		err = rtl8367b_extif_init_of(smi, 0, "realtek,extif0");
+		err = rtl8367b_extif_init_of(smi, RTL8367_EXTIF0,
+					     "realtek,extif0");
 		if (err)
 			return err;

-		err = rtl8367b_extif_init_of(smi, 1, "realtek,extif1");
+		err = rtl8367b_extif_init_of(smi, RTL8367_EXTIF1,
+					     "realtek,extif1");
 		if (err)
 			return err;

-		err = rtl8367b_extif_init_of(smi, 2, "realtek,extif2");
+		err = rtl8367b_extif_init_of(smi, RTL8367_EXTIF2,
+					     "realtek,extif2");
 		if (err)
 			return err;
 	} else {
-		err = rtl8367b_extif_init(smi, 0, pdata->extif0_cfg);
+		err = rtl8367b_extif_init(smi, RTL8367_EXTIF0,
+					  pdata->extif0_cfg);
 		if (err)
 			return err;

-		err = rtl8367b_extif_init(smi, 1, pdata->extif1_cfg);
+		err = rtl8367b_extif_init(smi, RTL8367_EXTIF1,
+					  pdata->extif1_cfg);
 		if (err)
 			return err;
 	}
@ -1273,12 +1481,16 @@ static int rtl8367b_sw_get_port_link(struct switch_dev *dev,
 				    struct switch_port_link *link)
 {
 	struct rtl8366_smi *smi = sw_to_rtl8366_smi(dev);
-	u32 data = 0;
+	u32 data = 0, sds_misc = 0;
 	u32 speed;

 	if (port >= RTL8367B_NUM_PORTS)
 		return -EINVAL;

+	if (port == 6 &&
+		of_device_is_compatible(smi->parent->of_node, "realtek,rtl8367s"))
+		rtl8366_smi_read_reg(smi, RTL8367S_SDS_MISC, &sds_misc);
+
 	rtl8366_smi_read_reg(smi, RTL8367B_PORT_STATUS_REG(port), &data);

 	link->link = !!(data & RTL8367B_PORT_STATUS_LINK);
@ -1299,7 +1511,10 @@ static int rtl8367b_sw_get_port_link(struct switch_dev *dev,
 		link->speed = SWITCH_PORT_SPEED_100;
 		break;
 	case 2:
-		link->speed = SWITCH_PORT_SPEED_1000;
+		link->speed = (((sds_misc & RTL8367S_CFG_MAC8_SEL_HSGMII_MASK)
+				>> RTL8367S_CFG_MAC8_SEL_HSGMII_SHIFT) == 1)
+				? SWITCH_PORT_SPEED_2500
+				: SWITCH_PORT_SPEED_1000;
 		break;
 	default:
 		link->speed = SWITCH_PORT_SPEED_UNKNOWN;
@ -1543,6 +1758,18 @@ static int rtl8367b_detect(struct rtl8366_smi *smi)
 		return ret;
 	}

+	dev_info(smi->parent,
+		"found chip num:%04x ver:%04x, mode:%04x\n",
+		chip_num, chip_ver, chip_mode);
+
+	/* rtl8367s: known chip num:6367 ver:00a0, mode:00a0 */
+
+	if (of_device_is_compatible(smi->parent->of_node, "realtek,rtl8367s")) {
+		if (chip_ver == 0x00a0)
+			chip_name = "8367S";
+		else
+			goto unknown_chip;
+	} else {
 	switch (chip_ver) {
 	case 0x0020:
 	case 0x1000:
@ -1552,15 +1779,19 @@ static int rtl8367b_detect(struct rtl8366_smi *smi)
 		chip_name = "8367R-VB";
 		break;
 	default:
-		dev_err(smi->parent,
-			"unknown chip num:%04x ver:%04x, mode:%04x\n",
-			chip_num, chip_ver, chip_mode);
-		return -ENODEV;
+			goto unknown_chip;
+		}
 	}

 	dev_info(smi->parent, "RTL%s chip found\n", chip_name);

 	return 0;
+
+unknown_chip:
+	dev_err(smi->parent,
+		"unknown chip num:%04x ver:%04x, mode:%04x\n",
+		chip_num, chip_ver, chip_mode);
+	return -ENODEV;
 }

 static struct rtl8366_smi_ops rtl8367b_smi_ops = {
@ -1599,11 +1830,17 @@ static int  rtl8367b_probe(struct platform_device *pdev)
 	smi->ops = &rtl8367b_smi_ops;
 	smi->num_ports = RTL8367B_NUM_PORTS;
 	if (of_property_read_u32(pdev->dev.of_node, "cpu_port", &smi->cpu_port)
-	    || smi->cpu_port >= smi->num_ports)
+	    || smi->cpu_port >= smi->num_ports) {
+		if (of_device_is_compatible(pdev->dev.of_node, "realtek,rtl8367s"))
+			smi->cpu_port = RTL8367S_CPU_PORT_NUM;
+		else
 		smi->cpu_port = RTL8367B_CPU_PORT_NUM;
+	}
 	smi->num_vlan_mc = RTL8367B_NUM_VLANS;
 	smi->mib_counters = rtl8367b_mib_counters;
 	smi->num_mib_counters = ARRAY_SIZE(rtl8367b_mib_counters);
+	if (of_device_is_compatible(pdev->dev.of_node, "realtek,rtl8367s"))
+		smi->phy_id = RTL8367S_PHY_ADDR;

 	err = rtl8366_smi_init(smi);
 	if (err)
@ -1650,6 +1887,7 @@ static void rtl8367b_shutdown(struct platform_device *pdev)
 #ifdef CONFIG_OF
 static const struct of_device_id rtl8367b_match[] = {
 	{ .compatible = "realtek,rtl8367b" },
+	{ .compatible = "realtek,rtl8367s" },
 	{},
 };
 MODULE_DEVICE_TABLE(of, rtl8367b_match);
--- a/target/linux/generic/files/include/linux/rtl8367.h
+++ b/target/linux/generic/files/include/linux/rtl8367.h
@ -18,6 +18,8 @@ enum rtl8367_port_speed {
 	RTL8367_PORT_SPEED_10 = 0,
 	RTL8367_PORT_SPEED_100,
 	RTL8367_PORT_SPEED_1000,
+	RTL8367S_PORT_SPEED_500M,
+	RTL8367S_PORT_SPEED_2500M,
 };

 struct rtl8367_port_ability {
@ -30,6 +32,12 @@ struct rtl8367_port_ability {
 	enum rtl8367_port_speed speed;
 };

+enum rtl8367_extif {
+	RTL8367_EXTIF0 = 0,
+	RTL8367_EXTIF1,
+	RTL8367_EXTIF2,
+};
+
 enum rtl8367_extif_mode {
 	RTL8367_EXTIF_MODE_DISABLED = 0,
 	RTL8367_EXTIF_MODE_RGMII,
@ -39,9 +47,11 @@ enum rtl8367_extif_mode {
 	RTL8367_EXTIF_MODE_TMII_PHY,
 	RTL8367_EXTIF_MODE_GMII,
 	RTL8367_EXTIF_MODE_RGMII_33V,
-	RTL8367B_EXTIF_MODE_RMII_MAC = 7,
+	RTL8367B_EXTIF_MODE_RMII_MAC,
 	RTL8367B_EXTIF_MODE_RMII_PHY,
 	RTL8367B_EXTIF_MODE_RGMII_33V,
+	RTL8367S_EXTIF_MODE_SGMII,
+	RTL8367S_EXTIF_MODE_HSGMII,
 };

 struct rtl8367_extif_config {
--- a/target/linux/generic/files/include/linux/switch.h
+++ b/target/linux/generic/files/include/linux/switch.h
@ -45,6 +45,7 @@ enum switch_port_speed {
 	SWITCH_PORT_SPEED_10 = 10,
 	SWITCH_PORT_SPEED_100 = 100,
 	SWITCH_PORT_SPEED_1000 = 1000,
+	SWITCH_PORT_SPEED_2500 = 2500,
 };

 struct switch_port_link {
--- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
+++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network
@ -39,6 +39,11 @@ rockchip_setup_interfaces()
 	friendlyarm,nanopi-r5s)
 		ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0"
 		;;
+	scensmart,sv901)
+		#ucidef_set_interfaces_lan_wan 'eth0' 'eth1'
+		ucidef_add_switch "switch0" \
+			"7@eth0" "0:lan:0" "1:lan:1" "2:lan:2" "3:lan:3" "4:lan:4" "5:lan:5" "6:wan:6"
+		;;
 	*)
 		ucidef_set_interface_lan 'eth0'
 		;;
@ -96,7 +101,8 @@ rockchip_setup_macs()
 	friendlyarm,nanopi-r5c|\
 	sharevdi,h3399pc|\
 	sharevdi,guangmiao-g4c|\
-	rocktech,mpc1903)
+	rocktech,mpc1903|\
+	scensmart,sv901)
 		wan_mac=$(generate_mac_from_mmc_cid)
 		lan_mac=$(macaddr_add "$wan_mac" +1)
 		;;
--- a/target/linux/rockchip/armv8/config-5.15
+++ b/target/linux/rockchip/armv8/config-5.15
@ -681,3 +681,15 @@ CONFIG_XZ_DEC_BCJ=y
 CONFIG_ZLIB_DEFLATE=y
 CONFIG_ZLIB_INFLATE=y
 CONFIG_ZONE_DMA32=y
+CONFIG_STAGING=y
+CONFIG_FB_TFT=y
+CONFIG_FB_TFT_ST7789V=y
+CONFIG_FB_CMDLINE=y
+CONFIG_FB_NOTIFY=y
+CONFIG_FB=y
+CONFIG_FB_SYS_FILLRECT=y
+CONFIG_FB_SYS_COPYAREA=y
+CONFIG_FB_SYS_IMAGEBLIT=y
+CONFIG_FB_SYS_FOPS=y
+CONFIG_FB_DEFERRED_IO=y
+CONFIG_FB_BACKLIGHT=y
--- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3399-sv901.dts
+++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3399-sv901.dts
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@ -261,3 +261,13 @@ define Device/xunlong_orangepi-r1-plus-lts
  DEVICE_PACKAGES := kmod-usb-net-rtl8152
 endef
 TARGET_DEVICES += xunlong_orangepi-r1-plus-lts
+
+define Device/scensmart_sv901
+  DEVICE_VENDOR := ScenSmart
+  DEVICE_MODEL := SV901
+  SOC := rk3399
+  UBOOT_DEVICE_NAME := scensmart-sv901-rk3399
+  IMAGE/sysupgrade.img.gz := boot-common | boot-script | pine64-bin | gzip | append-metadata
+  DEVICE_PACKAGES := kmod-r8168 -urngd kmod-igb-rockchip kmod-nvme cypress-firmware-4356-sdio scensmart-sv901-firmware kmod-usb-net-rtl8152 kmod-switch-rtl8367b
+endef
+TARGET_DEVICES += scensmart_sv901
--- a/target/linux/rockchip/patches-5.15/213-rockchip-rk3399-add-support-for-ScenSmart-SV901.patch
+++ b/target/linux/rockchip/patches-5.15/213-rockchip-rk3399-add-support-for-ScenSmart-SV901.patch
@ -0,0 +1,63 @@
+--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ro
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sv901.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-king3399.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+
+--- a/drivers/staging/fbtft/fb_st7789v_o.c	2023-01-24 14:22:49.000000000 +0800
+++ b/drivers/staging/fbtft/fb_st7789v.c	2023-02-24 09:09:34.201471285 +0800
+@@ -217,6 +217,31 @@ static int init_display(struct fbtft_par
+ 	return 0;
+ }
+ 
+
+static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+	switch(par->info->var.rotate)
+	{
+		case   0: xs+=53;xe+=53;ys+=40;ye+=40;
+				 break;
+		case  90: xs+=40;xe+=40;ys+=53;ye+=53;
+				 break;
+		case 180: xs+=53;xe+=53;ys+=40;ye+=40;
+				 break;
+		case 270: xs+=40;xe+=40;ys+=53;ye+=53;
+				 break;
+		default :
+				 break;
+	}
+
+	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+		  xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
+
+	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+		  ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
+
+	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+ /*
+  * write_vmem() - write data to display.
+  * @par: FBTFT parameter object.
+@@ -368,14 +393,15 @@ static int blank(struct fbtft_par *par,
+ 
+ static struct fbtft_display display = {
+ 	.regwidth = 8,
+-	.width = 240,
+-	.height = 320,
+	.width = 135,
+	.height = 240,
+ 	.gamma_num = 2,
+ 	.gamma_len = 14,
+ 	.gamma = HSD20_IPS_GAMMA,
+ 	.fbtftops = {
+ 		.init_display = init_display,
+ 		.write_vmem = write_vmem,
+		.set_addr_win = fbtft_set_addr_win,
+ 		.set_var = set_var,
+ 		.set_gamma = set_gamma,
+ 		.blank = blank,
--- a/target/linux/rockchip/patches-6.1/213-rockchip-rk3399-add-support-for-ScenSmart-SV901.patch
+++ b/target/linux/rockchip/patches-6.1/213-rockchip-rk3399-add-support-for-ScenSmart-SV901.patch
@ -0,0 +1,63 @@
+--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
+@@ -58,6 +58,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-ro
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-rockpro64.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sv901.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-king3399.dtb
+ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb
+
+--- a/drivers/staging/fbtft/fb_st7789v_o.c	2023-01-24 14:22:49.000000000 +0800
+++ b/drivers/staging/fbtft/fb_st7789v.c	2023-02-24 09:09:34.201471285 +0800
+@@ -217,6 +217,31 @@ static int init_display(struct fbtft_par
+ 	return 0;
+ }
+ 
+
+static void fbtft_set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
+{
+	switch(par->info->var.rotate)
+	{
+		case   0: xs+=53;xe+=53;ys+=40;ye+=40;
+				 break;
+		case  90: xs+=40;xe+=40;ys+=53;ye+=53;
+				 break;
+		case 180: xs+=53;xe+=53;ys+=40;ye+=40;
+				 break;
+		case 270: xs+=40;xe+=40;ys+=53;ye+=53;
+				 break;
+		default :
+				 break;
+	}
+
+	write_reg(par, MIPI_DCS_SET_COLUMN_ADDRESS,
+		  xs >> 8, xs & 0xFF, xe >> 8, xe & 0xFF);
+
+	write_reg(par, MIPI_DCS_SET_PAGE_ADDRESS,
+		  ys >> 8, ys & 0xFF, ye >> 8, ye & 0xFF);
+
+	write_reg(par, MIPI_DCS_WRITE_MEMORY_START);
+}
+ /*
+  * write_vmem() - write data to display.
+  * @par: FBTFT parameter object.
+@@ -368,14 +393,15 @@ static int blank(struct fbtft_par *par,
+ 
+ static struct fbtft_display display = {
+ 	.regwidth = 8,
+-	.width = 240,
+-	.height = 320,
+	.width = 135,
+	.height = 240,
+ 	.gamma_num = 2,
+ 	.gamma_len = 14,
+ 	.gamma = HSD20_IPS_GAMMA,
+ 	.fbtftops = {
+ 		.init_display = init_display,
+ 		.write_vmem = write_vmem,
+		.set_addr_win = fbtft_set_addr_win,
+ 		.set_var = set_var,
+ 		.set_gamma = set_gamma,
+ 		.blank = blank,
Author	SHA1	Message	Date
kos	5e3fc8b566	修正network初始化的配置文件	2023-06-14 09:15:52 +08:00
icevel	8b482e4a3e	support rtl8367s sfp port	2023-05-30 05:19:14 +00:00
icevel	977fe03c55	fix sv901 rtl8367s&led;add support for lcd&wifi	2023-04-28 09:01:50 +00:00
icevel	4f140c1e60	fix sv901 rtl8367s&led;add support for lcd&wifi	2023-04-28 08:56:40 +00:00
icevel	a6bc91008d	add support for sv901-eaiov1.0,rtl8367s ok	2023-04-21 15:28:05 +00:00
Hauke Mehrtens	3713f8b5b1	mbedtls: Update to version 2.28.3 This only fixes minor problems. Changelog: https://github.com/Mbed-TLS/mbedtls/releases/tag/v2.28.3 The 100-fix-compile.patch patch was merged upstream. The code style of all files in mbedtls 2.28.3 was changed. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>	2023-04-19 23:56:38 +08:00
Glenn Strauss	b06d1b8ec6	mbedtls: x509 crt verify SAN iPAddress Signed-off-by: Glenn Strauss <gstrauss@gluelogic.com>	2023-04-19 23:54:21 +08:00
Nick Hainke	39ee2e1f98	libcap: update to 2.68 Release Notes: https://sites.google.com/site/fullycapable/release-notes-for-libcap#h.vdh3d47czmle Signed-off-by: Nick Hainke <vincent@systemli.org>	2023-04-18 23:59:16 +08:00
Husky	4bba40608b	uboot-rockchip: revert use of standard boot (#11121 )	2023-04-17 23:38:51 +08:00
AmadeusGhost	4647696044	uboot-rockchip: refresh rk3399 defconfig Fixes: #11118	2023-04-16 23:53:45 +08:00